參數(shù)資料
型號(hào)： ADV7184BSTZ
廠商： ANALOG DEVICES INC
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： Multiformat SDTV Video Decoder with Fast Switch Overlay Support
中文描述： COLOR SIGNAL DECODER, PQFP80
封裝： LEAD FREE, MS-026BEC, LQFP-80
文件頁(yè)數(shù)： 32/108頁(yè)
文件大?。?/td> 925K
代理商： ADV7184BSTZ
ADV7184
Rev. 0 | Page 32 of 108
0
ANALOG VOLTAGE
RANGE SUPPORTED BY ADC (1.6V RANGE FOR ADV7184)
PRE-
PROCESSOR
(DPP)
ADC
SDP
(GAIN SELECTION ONLY)
MAXIMUM
VOLTAGE
MINIMUM
VOLTAGE
CLAMP
LEVEL
GAIN
CONTROL
Figure 21. Gain Control Overview
Table 39. AGC Modes
Input Video Type
Any
CVBS
Luma Gain
Manual gain luma.
Dependent on horizontal sync depth.
Chroma Gain
Manual gain chroma.
Dependent on color burst amplitude.
Taken from luma path.
Dependent on color burst amplitude.
Taken from luma path.
Dependent on color burst amplitude.
Taken from luma path.
Dependent on color burst amplitude.
Taken from luma path.
Taken from luma path.
Peak white.
Dependent on horizontal sync depth.
Y/C
Peak white.
YPrPb
Luma Gain
LAGC[2:0] Luma Automatic Gain Control, Address 0x2C [6:4]
The luma automatic gain control mode bits select the mode of
operation for the gain control in the luma path. There are ADI
internal parameters to customize the peak white gain control.
Contact ADI for more information.
Dependent on horizontal sync depth.
Table 40. LAGC Function
LAGC[2:0]
000
001
Description
Manual fixed gain (use LMG[11:0]).
AGC (blank level to sync tip). Peak white
algorithm OFF.
AGC (blank level to sync tip). Peak white
algorithm ON.
Reserved.
Reserved.
Reserved.
Reserved.
Freeze gain.
010 (default)
011
100
101
110
111
LAGT[1:0] Luma Automatic Gain Timing, Address 0x2F [7:6]
The luma automatic gain timing register allows the user to
influence the tracking speed of the luminance automatic gain
control. Note that this register only has an effect if the
LAGC[2:0] register is set to 001, 010, 011, or 100 (automatic
gain control modes).
If peak white AGC is enabled and active (see the section
STATUS_1[7:0], Address 0x10 [7:0]), the actual gain update
speed is dictated by the peak white AGC loop and, as a result,
the LAGT settings have no effect. As soon as the part leaves
peak white AGC, LAGT becomes relevant again.
The update speed for the peak white algorithm can be custom-
ized by the use of internal parameters. Contact ADI for more
information.
Table 41. LAGT Function
LAGT[1:0]
Description
00
Slow (TC = 2 sec).
01
Medium (TC = 1 sec).
10
Fast (TC = 0.2 sec).
11 (default)
Adaptive.
LG[11:0] Luma Gain, Address 0x2F [3:0]; Address 0x30 [7:0];
LMG[11:0] Luma Manual Gain, Address 0x2F [3:0];
Address 0x30 [7:0]
Luma gain [11:0] is a dual-function register. If written to, a
desired manual luma gain can be programmed. This gain
becomes active if the LAGC[2:0] mode is switched to manual
fixed gain. Equation 2 and Equation 3 show how to calculate a
desired gain for NTSC and PAL, respectively.
NTSC Luma_Gain
=
4095
]
11
[
1024
≤
<
LMG
= 0.9078…3.63
1128
(2)
PAL Luma_Gain
=
1024
<
LMG
1222
4095
]
11
[
≤
= 0.838…3.351
(3)
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