參數資料
型號: ADV7184BSTZ
廠商: ANALOG DEVICES INC
元件分類: 顏色信號轉換
英文描述: Multiformat SDTV Video Decoder with Fast Switch Overlay Support
中文描述: COLOR SIGNAL DECODER, PQFP80
封裝: LEAD FREE, MS-026BEC, LQFP-80
文件頁數: 4/108頁
文件大?。?/td> 925K
代理商: ADV7184BSTZ
ADV7184
INTRODUCTION
The ADV7184 is a high quality, single chip, multiformat video
decoder that automatically detects and converts PAL, NTSC,
and SECAM standards in the form of composite, S-Video, and
component video into a digital ITU-R BT.656 format.
Rev. 0 | Page 4 of 108
The advanced and highly flexible digital output interface enables
performance video decoding and conversion in line-locked
clock-based systems. This makes the device ideally suited for a
broad range of applications with diverse analog video charac-
teristics, including tape-based sources, broadcast sources,
security and surveillance cameras, and professional systems.
ANALOG FRONT END
The ADV7184 analog front end includes four 10-bit ADCs
that digitize the analog video signal before applying it to the
standard definition processor. The analog front end uses
differential channels to each ADC to ensure high performance
in mixed-signal applications.
The front end also includes a 12-channel input mux that enables
multiple video signals to be applied to the ADV7184. Current
and voltage clamps are positioned in front of each ADC to
ensure that the video signal remains within the range of the
converter. Fine clamping of the video signals is performed
downstream by digital fine clamping within the ADV7184. The
ADCs are configured to run in 4× oversampling mode.
The ADV7184 has optional antialiasing filters on each of the
four input channels. The filters are designed for SD video with
approximately 6 MHz bandwidth.
SCART and overlay functionality are enabled by the ADV7184’s
ability to simultaneously process CVBS and Standard Definition
RGB signals. Signal mixing is controlled by the Fast Blank pin.
STANDARD DEFINITION PROCESSOR (SDP)
The ADV7184 is capable of decoding a large selection of
baseband video signals in composite, S-Video, and component
formats. The video standards supported include PAL B/D/I/G/H,
PAL60, PAL M, PAL N, PAL Nc, NTSC M/J, NTSC 4.43, and
SECAM B/D/G/K/L. The ADV7184 can automatically detect
the video standard and process it accordingly.
The ADV7184 has a 5-line, superadaptive, 2D comb filter that
gives superior chrominance and luminance separation when
decoding a composite video signal. This highly adaptive filter
automatically adjusts its processing mode according to video
standard and signal quality without user intervention. Video
user controls such as brightness, contrast, saturation, and hue
are also available within the ADV7184.
The ADV7184 implements a patented adaptive digital line-
length tracking (ADLLT) algorithm to track varying video line
lengths from sources such as a VCR. ADLLT enables the
ADV7184 to track and decode poor quality video sources such
as VCRs, noisy sources from tuner outputs, VCD players, and
camcorders. The ADV7184 contains a chroma transient
improvement (CTI) processor that sharpens the edge rate of
chroma transitions, resulting in sharper vertical transitions.
The ADV7184 can process a variety of VBI data services, such
as closed captioning (CC), wide screen signaling (WSS), copy
generation management system (CGMS), Gemstar 1×/2×,
extended data service (XDS), and teletext. The ADV7184 is
fully Macrovision certified; detection circuitry enables Type I,
II, and III protection levels to be identified and reported to the
user. The decoder is also fully robust to all Macrovision signal
inputs.
FUNCTIONAL BLOCK DIAGRAM
S-YPrPb
SCART - (RGB + CVBS)
A/D
FANTI
10
A/D
FANTI
10
A/D
FANTI
10
A/D
FANTI
10
AIN1–
12
IMUX
PREPDATA
LUMA
ESYNC
FILTER
RELUMA
CONTROL
F
RECOVERY
CHROMA
DEMOD
CONVERSION
(5H MAX)
(4H MAX)
CVBS
C
DOWNSAMPLING
FILTERS
10
10
10
10
Cr
Cb
Y
CLAMP
CLAMP
CLAMP
CLAMP
FOVERLAY
CAND
IAV CODE
VBI DATA RECOVERY
DETECTION
GLOBAL CONTROL
AUSTANDARD
SYNTHESIZED
OUTFREE RUN
16
STANDARD DEFINITION PROCESSOR
R
G
B
Cr
Cb
8
8
PIXEL
P15-P8
HS
SFL
LLC2
LLC1
FIELD
VS
INT
O
CONTROL
FB
SCLOCK GENERATION
CSERIAL INTERFACE
CSYNC AND
ADV7184
0
Y
Cr
Cb
CVBS/Y
SCLK
SDA
ALSB
Figure 1.
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