參數(shù)資料
型號： ADV7184BSTZ
廠商： ANALOG DEVICES INC
元件分類： 顏色信號轉換
英文描述： Multiformat SDTV Video Decoder with Fast Switch Overlay Support
中文描述： COLOR SIGNAL DECODER, PQFP80
封裝： LEAD FREE, MS-026BEC, LQFP-80
文件頁數(shù)： 41/108頁
文件大小： 925K
代理商： ADV7184BSTZ
ADV7184
Table 61. HS Timing Parameters
Rev. 0 | Page 41 of 108
Characteristic
HS to Active Video
(LLC1 Clock Cycles)
(C in Figure 26) (default)
272
276
Standard
NTSC
NTSC Square
Pixel
PAL
HS Begin Adjust
(HSB[10:0]) (default)
00000000010
00000000010
HS End Adjust
(HSE[10:0]) (default)
00000000000
00000000000
Active Video
Samples/Line
(D in Figure 26)
720Y + 720C = 1440
640Y + 640C = 1280
Total LLC1
Clock Cycles
(E in Figure 26)
1716
1560
00000000010
00000000000
284
720Y + 720C = 1440
1728
0
E
VIDEO
LLC1
PBUS
HS
Cr
Y
FF
00
00
XY
80
10
80
10
80
10
FF
00
00
XY
Cb
Y
Cr
Y
Cb
Y
Cr
4 LLC1
D
HSB[10:0]
HSE[10:0]
C
E
D
SAV
ACTIVE VIDEO
H BLANK
EAV
Figure 26. HS Timing
HSE[10:0] HS End, Address 0x34 [2:0]; Address 0x36 [7:0]
The position of this edge is controlled by placing a binary
number into HSE[10:0]. The number applied offsets the edge
with respect to an internal counter that is reset to 0 immediately
after EAV code FF, 00, 00, XY (see Figure 26). HSE is set to
00000000000, which is 0 LLC1 clock cycles from count[0].
The default value of HSE[10:0] is 000, indicating that the HS
pulse ends 0 pixels after falling edge of HS.
For example:
1.
To shift the HS toward active video by 20 LLC1s, add
20 LLC1s to both HSB and HSE, that is, HSB[10:0] =
[00000010110], HSE[10:0] = [00000010100].
2.
To shift the HS away from active video by 20 LLC1s, add
1696 LLC1s to both HSB and HSE (for NTSC), that is,
HSB[10:0] = [11010100010], HSE[10:0] = [11010100000].
1696 is derived from the NTSC total number of pixels = 1716.
To move 20 LLC1s away from active video is equal to
subtracting 20 from 1716 and adding the result in binary to
both HSB[10:0] and HSE[10:0].
PHS Polarity HS, Address 0x37 [7]
The polarity of the HS pin can be inverted using the PHS bit.
0 (default)—HS is active high.
1—HS is active low.
VS and FIELD Configuration
The following controls allow the user to configure the behavior
of the VS and FIELD output pins, as well as to generate
embedded AV codes:
ADV encoder-compatible signals via NEWAVMODE
PVS, PF
HVSTIM
VSBHO, VSBHE
VSEHO, VSEHE
For NTSC control:
o
NVBEGDELO, NVBEGDELE, NVBEGSIGN,
NVBEG[4:0]
o
NVENDDELO, NVENDDELE, NVENDSIGN,
NVEND[4:0]
o
NFTOGDELO, NFTOGDELE, NFTOGSIGN,
NFTOG[4:0]
For PAL control:
o
PVBEGDELO, PVBEGDELE, PVBEGSIGN,
PVBEG[4:0]
o
PVENDDELO, PVENDDELE, PVENDSIGN,
PVEND[4:0]
o
PFTOGDELO, PFTOGDELE, PFTOGSIGN,
PFTOG[4:0]
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ADV7185 制造商:AD 制造商全稱:Analog Devices 功能描述:Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output
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ADV7186BBCZ 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
ADV7186BBCZ-RL 功能描述:IC VIDEO DECODER 196CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
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