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參數(shù)資料
| 型號： | ADS1191IPBSR |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 23/67頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AFE 16BIT 8KSPS 1CH 32TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 16 |
| 通道數(shù)： | 1 |
| 電壓 - 電源，模擬： | 2.7 V ~ 5.25 V |
| 電壓 - 電源，數(shù)字： | 1.7 V ~ 3.6 V |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（5x5） |
| 包裝： | 帶卷 (TR) |
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SBAS566A – DECEMBER 2011 – REVISED SEPTEMBER 2012
ELECTRICAL CHARACTERISTICS
Minimum and maximum specifications apply from –40°C to +85°C. Typical specifications are at +25°C. All specifications at
DVDD = 1.8 V, AVDD – AVSS = 3 V
(1), V
REF = 2.42 V, external fCLK = 512 kHz, data rate = 500 SPS, CFILTER = 4.7 nF
(2), and
gain = 6, unless otherwise noted.
ADS1191, ADS1192
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG INPUTS
Full-scale differential input voltage
±VREF/GAIN
V
(AINP – AINN)
See the Input Common-Mode Range
Input common-mode range
subsection of the PGA Settings and
Input Range section
Input capacitance
20
pF
Input = 1.5 V
±1
nA
Input bias current
Input = 1.5 V, TA = –40°C to +85°C
±2
nA
No lead-off
1000
M
Current source lead-off detection (nA range),
500
M
DC input impedance
AVSS + 0.3 V < AIN < AVDD – 0.3 V
Current source lead-off detection (A range),
100
M
AVSS + 0.6 V < AIN < AVDD – 0.6 V
PGA PERFORMANCE
Gain settings
1, 2, 3, 4, 6, 8, 12
With a 4.7-nF capacitor on PGA output
BW
Bandwidth
(see PGA Settings and Input Range section
8.5
kHz
for details)
ADC PERFORMANCE
Resolution
16
Bits
DR
Data rate
125
8000
SPS
CHANNEL PERFORMANCE (DC Performance)
Gain = 6(3), 10 seconds of data
24.6
μVPP
Gain = 6, 256 points, 0.5 seconds of data
24.6
25
μVPP
Input-referred noise
Gain settings other than 6, data rate other
See Noise Measurements section
than 500 SPS
INL
Integral nonlinearity
Full-scale with gain = 6, best fit
±1
LSB
Input-referred offset error
±100
μV
Input-referred offset error drift
2
μV/°C
Offset error with calibration
15
μV
Gain error
Excluding voltage reference error
±0.5
% of FS
Gain drift
Excluding voltage reference drift
5
ppm/°C
Gain match between channels
1
% of FS
CHANNEL PERFORMANCE (AC performance)
CMRR
Common-mode rejection ratio
fCM = 50 Hz, 60 Hz
(4)
–95
dB
PSRR
Power-supply rejection ratio
fPS = 50 Hz, 60 Hz
90
dB
Crosstalk
fIN = 50 Hz, 60 Hz
–120
dB
SNR
Signal-to-noise ratio
fIN = 10 Hz input, gain = 6
92
dB
THD
Total harmonic distortion
10 Hz, –0.5 dBFs
–100
dB
(1)
Performance is applicable for 5-V operation as well. Production testing for limits is performed at 3 V.
(2)
CFILTER is the capacitor accross the PGA outputs; see the PGA Settings and Input Range section for details.
(3)
Noise data measured in a 10-second interval. Test not performed in production. Input-referred noise is calculated with input shorted
(without electrode resistance) over a 10-second interval.
(4)
CMRR is measured with a common-mode signal of AVSS + 0.3 V to AVDD – 0.3 V. The values indicated are the minimum of the eight
channels.
Copyright 2011–2012, Texas Instruments Incorporated
3
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