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參數(shù)資料
| 型號： | ADS1191IPBSR |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 19/67頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AFE 16BIT 8KSPS 1CH 32TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 16 |
| 通道數(shù)： | 1 |
| 電壓 - 電源，模擬： | 2.7 V ~ 5.25 V |
| 電壓 - 電源，數(shù)字： | 1.7 V ~ 3.6 V |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（5x5） |
| 包裝： | 帶卷 (TR) |
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CS
SCLK
DRDY
DOUT
STAT
16-Bit
CH1
CH2
DIN
SBAS566A – DECEMBER 2011 – REVISED SEPTEMBER 2012
Data Input (DIN)
The data input pin (DIN) is used along with SCLK to communicate with the ADS1191/2 (opcode commands and
register data). The device latches data on DIN on the falling edge of SCLK.
Data Output (DOUT)
The data output pin (DOUT) is used with SCLK to read conversion and register data from the ADS1191/2. Data
on DOUT are shifted out on the rising edge of SCLK. DOUT goes to a high-impedance state when CS is high. In
read data continuous mode (see the SPI Command Definitions section for more details), the DOUT output line
also indicates when new data are available. This feature can be used to minimize the number of connections
between the device and the system controller.
Figure 29 shows the data output protocol for ADS1192.
Figure 29. SPI Bus Data Output for the ADS1192 (Two Channels)
Data Retrieval
Data retrieval can be accomplished in one of two methods. The read data continuous command (see the
RDATAC: Read Data Continuous section) can be used to set the device in a mode to read the data continuously
without sending opcodes. The read data command (see the RDATA: Read Data section) can be used to read
just one data output from the device (see the SPI Command Definitions section for more details). The conversion
data are read by shifting the data out on DOUT. The MSB of the data on DOUT is clocked out on the first SCLK
rising edge. DRDY returns to high on the first SCLK falling edge. DIN should remain low for the entire read
operation.
The number of bits in the data output depends on the number of channels and the number of bits per channel.
For the ADS1191/2, the number of data outputs is (16 status bits + 16 bits × 2 channels) = 48 bits. The format of
the 16 status bits is (1100 + LOFF_STAT[4:0] + GPIO[1:0] + 5 zeros). The data format for each channel data are
twos complement and MSB first. When channels are powered down using the user register setting, the
corresponding channel output is set to '0'. However, the sequence of channel outputs remains the same.
The ADS1191/2 also provide a multiple readback feature. The data can be read out multiple times by simply
giving more SCLKs, in which case the MSB data byte repeats after reading the last byte.
Data Ready (DRDY)
DRDY is an output. When it transitions low, new conversion data are ready. The CS signal has no effect on the
data ready signal. The behavior of DRDY is determined by whether the device is in RDATAC mode or the
RDATA command is being used to read data on demand. (See the RDATAC: Read Data Continuous and
RDATA: Read Data subsections of the SPI Command Definitions section for further details).
When reading data with the RDATA command, the read operation can overlap the occurrence of the next DRDY
without data corruption.
The START pin or the START command is used to place the device either in normal data capture mode or pulse
data capture mode.
26
Copyright 2011–2012, Texas Instruments Incorporated
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