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參數(shù)資料
| 型號： | ADM7008 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Octal Ethernet 10/100M PHY |
| 中文描述： | 八路個10/100M以太網(wǎng)物理層 |
| 文件頁數(shù)： | 55/92頁 |
| 文件大?。?/td> | 981K |
| 代理商： | ADM7008 |
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ADM7008
Function Description
During Read operation, a 2-bit turn around (TA) time spacing between the register
address field and data field is provided for the MDIO to avoid contention. Following the
turnaround time, a 16-bit data stream is read from or written into the MII management
registers of the ADM7008.
3.4.1 Preamble Suppression
The ADM7008 supports a preamble suppression mode as indicated by an 1 in bit 6 of the
basic mode status register (Register 1h). If the station management entity (i.e. MAC or
other management controller) determines that all PHYs in the system support preamble
suppression by reading a 1 in this bit, then the station management entity needs not
generate preamble for each management transaction. The ADM7008 requires a single
initialization sequence of 32 bits of preamble following powerup/hardware reset. This
requirement is generally met by pulling-up the resistor of MDIO. While the ADM7008
will respond to management accesses without preamble, a minimum of one idle bit
between management transactions is required as specified in IEEE 802.3u.
When ADM7008 detects that there is physical address match, then it will enable
Read/Write capability for external access. When neither physical address nor register
address is matched, then ADM7008 will tri-state the MDIO pin.
Figure 3-23 SMI Read Operation
3.4.2 Reset Operation
The ADM7008 can be reset either by hardware or software. A hardware reset is
accomplished by applying a negative pulse, with duration of at least 200 ms to the RC pin
of the ADM7008 during normal operation to guarantee internal Power On Reset Circuit
is reset well. Software reset is activated by setting the reset bit in the basic mode control
register (bit 15, register 0h). This bit is self-clearing and, when set, will return a value of
1 until the software reset operation has completed, please note that internal SRAM will
not be reset during software reset.
Figure 3-24 SMI Write Operation
ADMtek Inc.
3-25
MDC
MDIO (MAC)
MDIO (PHY)
z
0
1
1
0
0
1
1
0
0
0
0
0
0
0
z
0
0
0
1
0
0
1
1
0
0
0
0
0
0
0
0
z
Preamble
Start
Opcode
(Read)
PHY Address
(5'h0C in this example)
Register Address
(5'h00 in this example)
TA
Register Data (16'h1300 in this Example)
MDC
MDIO (MAC)
z
0
1
0
1
0
1
1
0
0
0
0
0
0
0
1
0
0
0
1
0
0
1
1
0
0
0
0
0
0
0
0
z
Preamble
Start
Opcode
(Write)
PHY Address
(5'h0C in this example)
Register Address
(5'h00 in this example)
TA
Register Data (16'h1300 in this Example)
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADM7008A3T1 | 功能描述:IC SWITCH CTRLR 10/100 128PQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ADM7008A3T1NP | 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY |
| ADM7008XA3T1 | 功能描述:IC SWITCH CTRLR 10/100 128PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| adm7008x-a3-t-1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: |
| ADM7008XA3T1XP | 制造商:Infineon Technologies AG 功能描述:GREEN, SWITCH / PHY |
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