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參數(shù)資料
| 型號： | ADM7008 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Octal Ethernet 10/100M PHY |
| 中文描述： | 八路個10/100M以太網(wǎng)物理層 |
| 文件頁數(shù)： | 24/92頁 |
| 文件大?。?/td> | 981K |
| 代理商： | ADM7008 |
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ADM7008
Interface Description
Pin #
Pin Name
Type
Pin Description
FIFO onto RXD. The start of valid data is indicated by 01 on
RXD1 and RXD0. If a false carrier or a symbol error is
detected, RXD1 and RXD0 are set to 10 for the duration of the
activity. Note that in 100Mb/s mode RXD can change once per
REFCLK cycle, whereas in 10Mb/s mode RXD must be held
steady for 10 consecutive REFCLK cycles.
Port 2 SMII Receive Data. RXD0 for the designated port
outputs data or in-band management information
synchronously to SMII REFCLK (pin 70). In 100Mb/s mode,
RXD0 outputs a new 10-bit segment starting with SYNC. In
10Mb/s mode, RXD0 must repeat each 10 bits segment 10
times. RXD1 for the designated port is acted as Speed Status
LED for port 2.
Port 2 SS_SMII Receive Data. RXD0 for the designated port
outputs data or in-band management information
synchronously to RXCLK (pin 75). In 100Mb/s mode, RXD0
outputs a new 10-bit segment starting with SYNC. In 10Mb/s
mode, RXD0 must repeat each 10 bits segment 10 times.
RXD1 for the designated port is acted as Speed Status LED for
port 2.
Duplex Recommend Value for Fiber Port. Value on this pin will
be latched by ADM7008 during power on reset as duplex
recommend value for all fiber ports.
0: Half duplex for all fiber ports.
1: Full duplex for all fiber ports.
Port 2 Carrier Sense/Receive Data Valid. CRSDV_P2 asserts
when the receive medium is non-idle. The assertion of
CRSDV_P2 is asynchronous to REFCLK. At the de-assertion
of carrier, CRSDV_P2 de-asserts synchronously to REFCLK
only on the first di-bit of RXD. If there is still data in the FIFO
not yet presented onto RXD, then on the second di-bit of RXD,
CRSDV_P2 is asserted synchronously to REFCLK. The
toggling of CRSDV_P2 on the first and second di-bit continues
until all the data in the FIFO is presented onto RXD.
CRSDV_P2 is asserted for the duration of carrier activity for a
false carrier event.
Not Used.
Not used in SMII and SS_SMII Mode
ADMtek Inc.
2-12
SMII Mode
SPDLED_P2,
SMII_RXD_P2
SS_SMII Mode
SPDLED_P2,
SSSMII_RXD_P
2
91
Power On
Setting
FX_DUPLEX
RMII Mode
CRSDV_P2
SMII/SS_SMII
Mode
N/A
RMII Mode
TXD[1:0]_P2
SMII Mode
LNKACT_P2,
SMII_TXD_P2
I/O,
8mA
PU
92, 93
I,
TTL,
PD
Port 2 RMII Transmit Data. Transmit data for port 2 inputs the
di-bits that re transmitted and are driven synchronously to
REFCLK. Note that in 100Mb/s mode, TXD can change once
per REFCLK cycle, whereas in 10Mb/s mode, TXD must be
held steady for 10 consecutive REFCLK cycles.
Link and Activity LED/Port 2 SMII Transmit Data. TXD0 for port
2 inputs the data that is transmitted and is driven synchronously
to SMII_REFCLK (pin 70). In 100Mb/s mode, TXD0 inputs a
new 10 bit segment starting with SYNC In 10Mb/s mode
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADM7008A3T1 | 功能描述:IC SWITCH CTRLR 10/100 128PQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ADM7008A3T1NP | 制造商:Infineon Technologies AG 功能描述:SWITCH / PHY |
| ADM7008XA3T1 | 功能描述:IC SWITCH CTRLR 10/100 128PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| adm7008x-a3-t-1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: |
| ADM7008XA3T1XP | 制造商:Infineon Technologies AG 功能描述:GREEN, SWITCH / PHY |
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