參數(shù)資料
型號: ADM7008
廠商: Electronic Theatre Controls, Inc.
英文描述: Octal Ethernet 10/100M PHY
中文描述: 八路個10/100M以太網(wǎng)物理層
文件頁數(shù): 39/92頁
文件大小: 981K
代理商: ADM7008
ADM7008
Function Description
3.1.9 Transmit Driver and Receiver
The ADM7008 integrates all the required signal conditioning functions in its 10Base-T
block such that external filters are not required. Only one isolation transformer and
impedance matching resistors are needed for the 10Base-T transmit and receive interface.
The internal transmit filtering ensures that all the
harmonics in the transmission signal are
attenuated properly.
3.1.10 Smart Squelch
The smart squelch circuit is responsible for determining when valid data is present on the
differential receive. The ADM7008 implements an intelligent receive squelch on the
RXP/RXN differential inputs to ensure that impulse noise on the receive inputs will not
be mistaken for a valid signal. The squelch circuitry employs a combination of amplitude
and timing measurements (as specified in the IEEE 802.3 10Base-T standard) to
determine the validity of data on the twisted-pair inputs.
The signal at the start of the packet is checked by the analog squelch circuit and any
pulses not exceeding the squelch level (either positive or negative, depending upon
polarity) will be rejected. Once this first squelch level is overcome correctly, the
opposite squelch level must then be exceeded within 150ns. Finally, the signal must
exceed the original squelch level within an additional 150ns to ensure that the input
waveform will not be rejected.
Only after all these conditions have been satisfied will a control signal be generated to
indicate to the remainder of the circuitry that valid data is present.
Valid data is considered to be present until the squelch level has not been generated for a
time longer than 200 ns, indicating end of packet. Once good data has been detected, the
squelch levels are reduced to minimize the effect of noise, causing premature end-of-
packet detection. The receive squelch threshold level can be lowered for use in longer
cable applications. This is achieved by setting bit 7 of register address 10h.
3.1.11 Carrier Sense
Carrier Sense (CRS) is asserted due to receive activity once valid data is detected via the
smart squelch function. For 10 Mbps half duplex operation, CRS is asserted during either
packet transmission or reception. For 10 Mbps full duplex and repeater mode operations,
the CRS is asserted only due to receive activity
.85
ADMtek Inc.
3-9
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