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參數(shù)資料
| 型號： | ADATE207BBPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | Quad Pin Timing Formatter |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA256 |
| 封裝： | ROHS COMPLIANT, MO-192-BAL-2, LBGA-256 |
| 文件頁數(shù)： | 21/36頁 |
| 文件大?。?/td> | 374K |
| 代理商： | ADATE207BBPZ |
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ADATE207
CONTROL AND STATUS REGISTERS
This section details the breakdown of the configuration and status registers in the ADATE207. An address map provides the locations of
all registers, and the detailed descriptions that follow show how each register is used.
Rev. 0 | Page 21 of 36
Table 13. Address Map
Chip Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13 to 0x18
0x19
1x1A
0x1B
0x1C
0x1D
0x1E
0x1F
Register Description
Comparator and Fail Status. Channel-specific address space.
Fail Counter Low.
Fail Counter High.
Static Configuration.
Dynamic Configuration.
Waveform/Calibration Memory Address.
Waveform D0 Vernier Delay and Action.
Waveform D0 Course Delay.
Waveform D1 Vernier Delay and Action.
Waveform D1 Course Delay.
Waveform D2 Vernier Delay and Action.
Waveform D2 Course Delay.
Waveform D3 Vernier Delay and Action.
Waveform D3 Course Delay.
Calibration Memory D0.
Calibration Memory D1.
Calibration Memory D2.
Calibration Memory D3.
DUT Data Selection.
Unused. Reserved.
Software Resets. Common register address space.
Round Trip Delay Value.
T0 Alignment Pipeline Depth.
TMU Channel Select.
Channel Multiplex Enable.
Channel Status.
Chip Information.
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