參數(shù)資料
型號(hào): AD9920ABBCZ
廠商: Analog Devices Inc
文件頁數(shù): 50/112頁
文件大小: 0K
描述: IC PROCESSOR CCD 12BIT 105CSPBGA
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
電壓 - 電源,模擬: 1.6 V ~ 2 V
電壓 - 電源,數(shù)字: 1.6 V ~ 2 V
封裝/外殼: 105-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 105-CSPBGA(8x8)
包裝: 管件
AD9920A
Rev. B | Page 42 of 112
Hold Area Using the FREEZE/RESUME Registers
The FREEZE/RESUME registers can also be used to create a
hold area in which the V-outputs are temporarily held and later
continued, starting at the point where they were held. As shown
in Figure 53, the hold area function is different from the vertical
masking function in that the V-outputs continue from where
they stopped rather than continuing from where they would
have been. The hold area temporarily stops the pixel counter
for the V-outputs, whereas vertical masking allows the counter
to continue in the masking area.
XV1
XV8
HD
NOTES
1. WHEN HOLD = 1 FOR ANY V-SEQUENCE GROUP, THE FREEZE AND RESUME REGISTERS ARE USED TO SPECIFY THE HOLD AREA.
2. IN THIS EXAMPLE, XV1 TO XV10 ARE ASSIGNED TO GROUP A. HOLD BIT FOR GROUP A = 1.
3. H-COUNTER FOR GROUP A (XV1 TO XV10) STOPS DURING HOLD AREA.
XV9
HOLD AREA
FOR GROUP A
XV10
FREEZE
RESUME
0
68
78
-05
2
Figure 53. Hold Area for Group A
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參數(shù)描述
AD9920ABBCZRL 功能描述:IC PROCESSOR CCD 12BIT 105CSPBGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率(瓦特):- 電壓 - 電源,模擬:3 V ~ 3.6 V 電壓 - 電源,數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN(5x5) 包裝:帶卷 (TR)
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