參數(shù)資料
型號： AD9920ABBCZ
廠商： Analog Devices Inc
文件頁數(shù)： 14/112頁
文件大?。?/td> 0K
描述： IC PROCESSOR CCD 12BIT 105CSPBGA
標準包裝： 1
位數(shù)： 12
電壓 - 電源，模擬： 1.6 V ~ 2 V
電壓 - 電源，數(shù)字： 1.6 V ~ 2 V
封裝/外殼： 105-LFBGA，CSPBGA
供應商設備封裝： 105-CSPBGA（8x8）
包裝： 管件
AD9920A
Rev. B | Page 110 of 112
Address
Data
Bits
Default
Value
Update
Type
Name
Description
0x1A
[12:0]
X
SCP
HBLKTOGO3
Third HBLK toggle position for odd lines, or RA2H1REPA/B/C.
[25:13]
X
HBLKTOGO4
Fourth HBLK toggle position for odd lines, or RA3H1REPA/B/C.
0x1B
[12:0]
X
SCP
HBLKTOGO5
Fifth HBLK toggle position for odd lines, or RA4H1REPA/B/C.
[25:13]
X
HBLKTOGO6
Sixth HBLK toggle position for odd lines, or RA5H1REPA/B/C.
0x1C
[12:0]
X
SCP
HBLKTOGE1
First HBLK toggle position for even lines, or RA0H2REPA/B/C.
[25:13]
X
HBLKTOGE2
Second HBLK toggle position for even lines, or RA1H2REPA/B/C.
0x1D
[12:0]
X
SCP
HBLKTOGE3
Third HBLK toggle position for even lines, or RA2H2REPA/B/C.
[25:13]
X
HBLKTOGE4
Fourth HBLK toggle position for even lines, or RA3H2REPA/B/C.
0x1E
[12:0]
X
SCP
HBLKTOGE5
Fifth HBLK toggle position for even lines, or RA4H2REPA/B/C.
[25:13]
X
HBLKTOGE6
Sixth HBLK toggle position for even lines, or RA5H2REPA/B/C.
0x1F
[12:0]
X
SCP
HBLKSTARTA
HBLK repeat area Start Position A for HBLK Mode 1. Set to 8191 if not used.
[25:13]
X
HBLKSTARTB
HBLK repeat area Start Position B for HBLK Mode 1. Set to 8191 if not used.
0x20
[12:0]
X
SCP
HBLKSTARTC
HBLK repeat area Start Position C for HBLK Mode 1. Set to 8191 if not used.
[16:13]
VMASK_EVEN
1 = enable FREEZE/RESUME for each VPAT group (A, B, C, D); even lines.
[20:17]
VMASK_ODD
1 = enable FREEZE/RESUME for each VPAT group (A, B, C, D); odd lines.
0x21
[2:0]
X
SCP
HBLKALT_PAT0
HBLK Mode 1, Repeat Area 0 pattern for odd lines.
[6:4]
X
HBLKALT_PAT1
HBLK Mode 1, Repeat Area 1 pattern for odd lines.
[10:8]
X
HBLKALT_PAT2
HBLK Mode 1, Repeat Area 2 pattern for odd lines.
[14:12]
X
HBLKALT_PAT3
HBLK Mode 1, Repeat Area 3 pattern for odd lines.
[18:16]
X
HBLKALT_PAT4
HBLK Mode 1, Repeat Area 4 pattern for odd lines.
[22:20]
X
HBLKALT_PAT5
HBLK Mode 1, Repeat Area 5 pattern for odd lines.
0x22
[12:0]
X
SCP
CLPOBTOG1
CLPOB Toggle Position 1.
[25:13]
X
CLPOBTOG2
CLPOB Toggle Position 2.
0x23
[12:0]
X
SCP
PBLKTOG1
PBLK Toggle Position 1.
[25:13]
X
PBLKTOG2
PBLK Toggle Position 2.
0x24
[11:0]
X
SCP
HBLK2OFF_A_E
HCLK Offset A for even lines. Used during HBLK Mode 1.
[23:12]
X
HBLK2OFF_A_O
HCLK Offset A for odd lines. Used during HBLK Mode 1.
0x25
[11:0]
X
SCP
HBLK2OFF_B_E
HCLK Offset B for even lines. Used during HBLK Mode 1.
[23:12]
X
HBLK2OFF_B_O
HCLK Offset B for odd lines. Used during HBLK Mode 1.
0x26
[11:0]
X
SCP
HBLK2OFF_C_E
HCLK Offset C for even lines. Used during HBLK Mode 1.
[23:12]
X
HBLK2OFF_C_O
HCLK Offset C for odd lines. Used during HBLK Mode 1.
0x27
[12:0]
X
SCP
HBLKCNT_START
Start position for HBLK counter.
For HBLK operation, HBLKCNT_START should be set equal to the value of
HBLKSTART; if HBLK interval is not needed, set to 8191.
[13]
X
HBLKEND[13]
MSB for HBLKEND register (V-Sequence Register 0x17, Bits[25:13]).
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相關代理商/技術參數(shù)
參數(shù)描述
AD9920ABBCZRL 功能描述:IC PROCESSOR CCD 12BIT 105CSPBGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應商設備封裝:32-QFN（5x5） 包裝:帶卷 (TR)
AD9920BBCZ 制造商:Analog Devices 功能描述:
AD9920BBCZRL 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9921BBCZ 制造商:Analog Devices 功能描述:
AD9921BBCZRL 制造商:Analog Devices 功能描述:
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