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參數(shù)資料
| 型號： | AD9877ABSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PROCESSOR FRONT END 100MQFP |
| 標準包裝： | 1 |
| 位數(shù)： | 12 |
| 通道數(shù)： | 3 |
| 功率（瓦特）： | 1.17W |
| 電壓 - 電源，模擬： | 3.3V |
| 電壓 - 電源，數(shù)字： | 3.3V |
| 封裝/外殼： | 100-BQFP |
| 供應商設備封裝： | 100-MQFP（14x20） |
| 包裝： | 托盤 |
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AD9877
Rev. B | Page 18 of 36
REGISTER MAP AND BIT DEFINITIONS
Table 4. Register Map1
Address
(Hex)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
(Hex)
Type
0x00
SDIO
Bidirectional
LSB First
RESET
OSCIN Multiplier M [4]
08
Read/write
0x01
PLL Lock
Detect
SYSCLK
Divider
N = 3
(N = 4
Default)
MCLK Divider R [5:0]
00
Read/write
0x02
Power-
Down PLL
Power-
Down
DAC Tx
Power-Down
Digital Tx
Power-
Down
12-Bit
ADC
Power-Down
12-Bit ADC
Reference
0
Power-
Down
8-Bit
ADC
00
Read/write
0x03
Σ-Δ Output [0] Control Word [3:0] LSB
0
Flag [0]
Enable
00
Read/write Σ-Δ
0x04
Flag [0]
Σ-Δ Output 0 Control Word [11:4] MSB
00
Read/write Σ-Δ
0x05
Σ-Δ Output [0] Control Word [3:0] LSB
0
Flag [1]
Enable
00
Read/write Σ-Δ
0x06
Flag [1]
Σ-Δ Output 1 Control Word [11:4] MSB
00
Read/write Σ-Δ
0x07
0
00
Read/write Tx
0x08
ADC Clock
Select
0
Power-
Down
RxSYNC
and 8-
Bit ADC
Clock
0
80
Read/write
ADC
0x09
0
00
Read/write
0x0A
0
00
Read only
0x0B
0
00
Read/write
0x0C
0
1
Version [3:0]
10
Read only
0x0D
Tx Frequency Tuning
Word Profile 3 LSBs [1:0]
Tx Frequency Tuning
Word Profile 2 LSBs [1:0]
Tx Frequency Tuning
Word Profile 1 LSB [1:0]
Tx Frequency Tuning
Word Profile 3 LSBs [1:0]
00
Read/write Tx
0x0E
0
DAC Gain Control [3:0]
00
Read/write Tx
0x0F
0
Profile Select [1:0]
CA Interface
Mode Select
0
Spectral
Inversion Tx
Single-
Tone Tx
Mode
00
Read/write Tx
0x10
Tx Frequency Turning Word Profile 0 [9:2]
00
Read/write Tx
0x11
Tx Frequency Turning Word Profile 0 [17:10]
00
Read/write Tx
0x12
Tx Frequency Turning Word Profile 0 [25:18]
00
Read/write Tx
0x13
CA Interface Transmit Word Control Profile 0 [7:4]
DAC Gain Control Profile 0 [3:0]
00
Read/write Tx
0x14
Tx Frequency Turning Word Profile 1 [9:2]
00
Read/write Tx
0x15
Tx Frequency Turning Word Profile 1 [9:2]
00
Read/write Tx
0x16
Tx Frequency Turning Word Profile 1 [9:2]
00
Read/write Tx
0x17
CA Interface Transmit Word Control Profile 1 [7:4]
DAC Gain Control Profile 1 [3:0]
00
Read/write Tx
0x18
Tx Frequency Turning Word Profile 2 [9:2]
00
Read/write Tx
0x19
Tx Frequency Turning Word Profile 2 [9:2]
00
Read/write Tx
1A
Tx Frequency Turning Word Profile 2 [9:2]
00
Read/write Tx
0x1B
CA Interface Transmit Word Control Profile 2 [7:4]
DAC Gain Control Profile 2 [3:0]
00
Read/write Tx
0x1C
Tx Frequency Turning Word Profile 3 [9:2]
00
Read/write Tx
0x1D
Tx Frequency Turning Word Profile 3 [9:2]
00
Read/write Tx
0x1E
Tx Frequency Turning Word Profile 3 [9:2]
00
Read/write Tx
0x1F
CA Interface Transmit Word Control Profile 3 [7:4]
DAC Gain Control Profile 3 [3:0]
00
Read/write Tx
1 Register bits denoted with 0 must be programmed with a 0 each time that register is written.
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