fIN
參數(shù)資料
型號(hào)： AD9653BCPZRL7-125
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 16/40頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT 125MSPS SRL 48LFCSP
標(biāo)準(zhǔn)包裝： 750
位數(shù)： 16
采樣率（每秒）： 125M
數(shù)據(jù)接口： LVDS，串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
功率耗散（最大）： 708mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-WFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 48-LFCSP-WQ（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個(gè)差分，單極
Data Sheet
AD9653
Rev. 0 | Page 23 of 40
Figure 53. SNR/SFDR vs. Common-Mode Voltage,
fIN = 9.7 MHz, fSAMPLE = 125 MSPS, VREF = 1.3 V
Differential Input Configurations
There are several ways to drive the AD9653 either actively or
passively. However, optimum performance is achieved by driving
the analog inputs differentially. Using a differential double balun
configuration to drive the AD9653 provides excellent performance
and a flexible interface to the ADC (see Figure 56) for baseband
applications.
For applications where SNR is a key parameter, differential trans-
former coupling is the recommended input configuration (see
Figure 57), because the noise performance of most amplifiers is
not adequate to achieve the true performance of the AD9653.
Regardless of the configuration, the value of the shunt capacitor,
C, is dependent on the input frequency and may need to be
reduced or removed.
It is not recommended to drive the AD9653 inputs single-ended.
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9653.
VREF can be configured using either the internal 1.0 V refer-
ence, an externally applied 1.0 V to 1.3 V reference voltage, or
using an external resistor divider applied to the internal refer-
ence to produce a reference voltage of the user’s choice. The
various reference modes are summarized in the Internal Reference
section. The VREF pin should be externally bypassed to ground
with a low ESR, 1.0 μF capacitor in parallel with a low ESR,
0.1 μF ceramic capacitor.
Internal Reference Connection
A comparator within the AD9653 detects the potential at the
SENSE pin and configures the reference into one of three
possible modes, which are summarized in Table 11. If SENSE is
grounded, the reference amplifier switch is connected to the
internal resistor divider (see Figure 54), setting the voltage at the
VREF pin, VREF, to 1.0 V. If SENSE is connected to an external
resistor divider (see Figure 55), VREF is defined as
+
×
=
R1
R2
VREF
1
5
.
0
where:
7 k ≤ (R1 + R2) ≤ 10 k
Figure 54. 1.0 V Internal Reference Configuration
Figure 55. Programmable Internal Reference Configuration
Table 11. Reference Configuration Summary
Selected Mode
SENSE Voltage (V)
Resulting V
REF (V)
Resulting Differential Span
(V p-p)
Fixed Internal Reference
AGND to 0.2
1.0 internal
2.0
Programmable Internal Reference
Tie to external R-divider
0.5 × (1 + R2/R1), example: R1 = 3.5 kΩ,
R2 = 5.6 kΩ for V
REF = 1.3 V
2 × V
REF
Fixed External Reference
AVDD
1.0 to 1.3 applied to external VREF pin1
2.0 to 2.6
1 Normal operation for V
REF = 1.3 V is supported over the 0°C to 85°C temperature range.
20
30
40
50
60
70
80
90
100
110
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
S
NR/
S
F
DR
(
d
BF
S
/d
Bc)
COMMON-MODE VOLTAGE (V)
SFDR (dBc)
SNRFS (dBFS)
10538-
053
VREF
SENSE
0.5V
AD9653
SELECT
LOGIC
0.1F
1.0F
VIN–A
VIN+A
ADC
CORE
10538-
054
VREF
SENSE
R1
R2
0.5V
AD9653
SELECT
LOGIC
0.1F
1.0F
VIN–A
VIN+A
ADC
CORE
10538-
055
+
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