參數(shù)資料
型號(hào)： 35007B
廠商： Microchip Technology Inc.
英文描述： 18-pin Enhanced FLASH/EEPROM 8-bit Microcontroller
中文描述： 18針/ EEPROM的8位微控制器的閃存
文件頁(yè)數(shù)： 41/88頁(yè)
文件大?。?/td> 1495K
代理商： 35007B
2000 Microchip Technology Inc.
DS35007B-page 39
PIC16F84A
DECFSZ
Decrement f, Skip if 0
Syntax:
Operands:
[ label DECFSZ f,d
0
≤
f
≤
127
d
∈
[0,1]
(f) - 1
→
(destination);
skip if result = 0
None
The contents of register ’f’ are
decremented. If ’d’ is 0, the result
is placed in the W register. If ’d’ is
1, the result is placed back in
register ’f’.
If the result is 1, the next instruc-
tion is executed. If the result is 0,
then a
NOP
is executed instead,
making it a 2T
CY
instruction.
Operation:
Status Affected:
Description:
GOTO
Unconditional Branch
Syntax:
Operands:
Operation:
[ label GOTO k
0
≤
k
≤
2047
k
→
PC<10:0>
PCLATH<4:3>
→
PC<12:11>
None
GOTO
is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>.
GOTO
is a two-
cycle instruction.
Status Affected:
Description:
INCF
Increment f
Syntax:
Operands:
[ label INCF f,d
0
≤
f
≤
127
d
∈
[0,1]
(f) + 1
→
(destination)
Z
The contents of register ’f’ are
incremented. If ’d’ is 0, the result
is placed in the W register. If ’d’ is
1, the result is placed back in
register ’f’.
Operation:
Status Affected:
Description:
INCFSZ
Increment f, Skip if 0
Syntax:
Operands:
[ label INCFSZ f,d
0
≤
f
≤
127
d
∈
[0,1]
(f) + 1
→
(destination),
skip if result = 0
None
The contents of register ’f’ are
incremented. If ’d’ is 0, the result is
placed in the W register. If ’d’ is 1,
the result is placed back in
register ’f’.
If the result is 1, the next instruc-
tion is executed. If the result is 0,
a
NOP
is executed instead, making
it a 2T
CY
instruction.
Operation:
Status Affected:
Description:
IORLW
Inclusive OR Literal with W
Syntax:
Operands:
Operation:
Status Affected:
Description:
[ label IORLW k
0
≤
k
≤
255
(W) .OR. k
→
(W)
Z
The contents of the W register are
OR’ed with the eight-bit literal 'k'.
The result is placed in the W
register.
IORWF
Inclusive OR W with f
Syntax:
Operands:
[
label
] IORWF f,d
0
≤
f
≤
127
d
∈
[0,1]
(W) .OR. (f)
→
(destination)
Z
Inclusive OR the W register with
register 'f'. If 'd' is 0, the result is
placed in the W register. If 'd' is 1,
the result is placed back in
register 'f'.
Operation:
Status Affected:
Description:
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