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| 型號： | 0W888-002-XTP |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | BelaSigna 250 - 16 bit Audio Processor, Full Stereo 2-in, 2-out; Package: LFBGA 64, 7x7; No of Pins: 64; Container: Tape and Reel; Qty per Container: 1500 |
| 中文描述： | 0-BIT, 50 MHz, MIXED DSP, PBGA64 |
| 封裝： | 7 X 7 MM, GREEN, LFBGA-64 |
| 文件頁數(shù)： | 7/34頁 |
| 文件大?。?/td> | 935K |
| 代理商： | 0W888-002-XTP |
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Rev. 7 | Page 15 of 34 | www.onsemi.com
BelaSigna 250
3.2 Weighted Overlap-Add (WOLA) Filterbank Coprocessor
Figure 7: WOLA Filterbank Coprocessor Architecture
The WOLA coprocessor performs low-delay, high-fidelity filterbank processing to provide efficient time-frequency processing and alias-
free gain adjustments. The WOLA coprocessor stores intermediate data values as well as program code and window coefficients in its
own memory space. Audio data are accessed directly from the input and output FIFOs where they are automatically managed by the
IOP.
The WOLA coprocessor can be configured to provide different sizes and types of transforms, such as mono, simple stereo or full stereo
configurations. The number of bands, the stacking mode (even or odd), the oversampling factor and the shape of the analysis and
synthesis windows used are all configurable. The selected set of parameters affects both the frequency resolution, the group delay
through the WOLA coprocessor and the number of cycles needed for complete execution.
The WOLA coprocessor can generate both real and complex data or energy values that represent the energy in each band. Either real
or complex gains can be applied to the data. Complex gains provide means for phase adjustments, which is useful in sub-band
directional hearing aid applications. The RCore always has access to these values through shared memories. All parameters are
configurable with microcode, which is used to control the WOLA coprocessor during execution.
The RCore initiates all WOLA functions (analysis, gain application, synthesis) through dedicated control registers. A dedicated interrupt
is used to signal completion of a WOLA function.
A large number of standard WOLA microcode configurations are delivered with the BelaSigna 250 Evaluation and Development Kit
(EDK). These configurations have been specially designed for low group delay and high fidelity.
3.3 Input/Output Processor (IOP)
The IOP is an audio-optimized configurable DMA unit for audio data samples. It manages the collection of data from the A/D converters
to the input FIFO and feeds digital data to the audio output stage from the output FIFO.
The IOP places and retrieves FIFO data in memories shared with the RCore. Each FIFO (input and output) has two memory interfaces.
The first corresponds with the normal FIFO. Here the address of the most recent input block changes as new blocks of samples arrive.
The second corresponds with the Smart FIFO. In this scheme the address of the most recent input block is fixed. The Smart FIFO
interface is especially useful for time-domain filters.
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