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參數(shù)資料
| 型號： | 0W888-002-XTP |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | BelaSigna 250 - 16 bit Audio Processor, Full Stereo 2-in, 2-out; Package: LFBGA 64, 7x7; No of Pins: 64; Container: Tape and Reel; Qty per Container: 1500 |
| 中文描述： | 0-BIT, 50 MHz, MIXED DSP, PBGA64 |
| 封裝： | 7 X 7 MM, GREEN, LFBGA-64 |
| 文件頁數(shù)： | 20/34頁 |
| 文件大?。?/td> | 935K |
| 代理商： | 0W888-002-XTP |
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Rev. 7 | Page 27 of 34 | www.onsemi.com
BelaSigna 250
Table 11: Electrical Specification (Continued)
Analog Output Stage
Description
Symbol
Conditions
Min.
Typ.
Max.
Units
Screened
Analog output voltage
VOUT
0
-
2
V
Attenuator gain tolerance
ATG
Input is –6dB re: full scale @
1kHz (all preamplifier gains)
-1
-
1
dB
√
Output impedance
ROUT
12dB attenuation
9
13
17
k
√
Output noise
OUTN
0dB attenuation
-
33
40
μV
Output dynamic range
OUTDR
Unweighted, 100Hz to 8kHz BW,
mono
85
87
-
dB
Output THD+N
OUTTHDN
Unweighted, 100Hz to 22kHz
BW, mono
-
-70
-67
dB
Anti-Aliasing Filters (Input and Output)
Description
Symbol
Conditions
Min.
Typ.
Max.
Units
Screened
Preamplifier filter cut-off
frequency
Preamp not bypassed
-
25
-
kHz
Digital anti-aliasing filter cut-off
frequency
-
fs/2
-
25kHz
15
25
35
kHz
Analog output cut-off frequency
12kHz (only output filter)
9
12
15
kHz
Passband flatness
-1
-
1
dB
Stopband attenuation
60kHz (12kHz cut-off)
-
60
-
dB
Low-Speed A/D
Description
Symbol
Conditions
Min.
Typ.
Max.
Units
Screened
Input voltage
Peak input voltage
0
-
2.0
V
√
INL
From GND to 2*VREG
-
10
LSB
DNL
From GND to 2*VREG
-
2
LSB
Maximum variation over
temperature (0
C to 50C)
-
5
LSB
Sampling frequency
All channels sequentially
-
12.8
-
kHz
Channel sampling frequency
8 channels
-
1.6
-
kHz
Digital Pads
Description
Symbol
Conditions
Min.
Typ.
Max.
Units
Screened
Voltage level for high input
VIH
VDDC
* 0.8
-
VDDC
+ 0.56
V
Voltage level for low input
VIL
-0.3
-
VDDC
* 0.2
V
Input capacitance for digital pads CIN
-
2
-
pF
Pull-up resistance for digital input
pads
RUP_IN
-
260
-
k
√
VDDC = 1.0V
-
430
-
k
VDDC = 1.25V
-
260
-
k
√
Pull-down resistance to VDDC
for digital input pads
RDOWN_IN
VDDC = 2.0V
-
140
-
k
Pull-up resistance for digital input
pads
RUP_IN
-
260
-
k
√
Rise and fall time
Tr, Tf
Digital output pad
-
100
ns
ESD
Human Body Model
2
-
kV
Latch-up
V<GNDO, V>VDDO
200
-
mA
6 Max voltage should be limited to 2.2V peak regardless of VDDC. Protection diodes will be enabled above this voltage.
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