參數(shù)資料
型號: ZPSD613(V)E1
英文描述: Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,零功耗,4K位SRAM,26個可編程I/O,通用PLD有63個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備和嵌入式微-細胞(可編程邏輯,零功耗,4K的位的SRAM,26余個可編程輸入/輸出,通用PLD的有63個輸入)
文件頁數(shù): 59/98頁
文件大?。?/td> 484K
代理商: ZPSD613(V)E1
ZPSD6XX(V) Family
12-59
APD EN
PMMR0 BIT 1
ALE POLARITY
PMMR0 BIT 0
ALE
CSI
CLKIN
APD
CLEAR
LOGIC
EDGE
DETECT
APD
COUNTER
POWER DOWN (PD)
DISABLE BUS
INTERFACE
EPROM
SELECT
SRAM
SELECT
I/O
SELECT
PD
CLR
PD
SLEEP
MODE
SLEEP-EN
PMMR1 BIT 1
DISABLE EPROM/SRAM
ZPLD
Figure 28. APD Logic Block
APD DISABLED
SET ALE POLARITY
IN PMMR0 BIT 0
NEED
SLEEP
MODE
ENABLE APD
SET PMMR0 BIT 1 = 1
DISABLE ZPLD CLKIN
SET PMMR0 BIT 4, 5 = 1
DISABLE ZPLD CLKIN
SET PMMR0 BIT 4, 5 = 1
ZPSD6XX(V)
IN POWER DOWN MODE
RESET
ENABLE SLEEP MODE
SET PMMR1 BIT 1
ENABLE APD
SET PMMR0 BIT 1 = 1
ZPSD6XX(V)
IN SLEEP MODE
ALE IDLE AND
15 CLKIN CLOCK
ALE IDLE AND
15 CLKIN CLOCK
YES
NO
Figure 29. Enable Power Down Flow Chart
Power
Management
Unit
(cont.)
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