NOTE: VDD=" />
參數(shù)資料
型號(hào): XRT83VSH314IB
廠商: Exar Corporation
文件頁(yè)數(shù): 22/80頁(yè)
文件大?。?/td> 0K
描述: IC LIU SH T1/E1/J1 14CH 304TBGA
標(biāo)準(zhǔn)包裝: 27
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 14/14
規(guī)程: T1,E1,J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 304-BBGA
供應(yīng)商設(shè)備封裝: 304-PBGA(31x31)
包裝: 托盤
XRT83VSH314
26
REV. 1.0.1
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
NOTE: VDD=3.3V ±5%, VDDc=1.8V ±5%, TA=25°C, Unless Otherwise Specified
4.2
HDB3/B8ZS Encoder
In single rail mode, the LIU can encode the TPOS input signal to AMI or HDB3/B8ZS data. In E1 mode and
HDB3 encoding selected, any sequence with four or more consecutive zeros in the input will be replaced with
000V or B00V, where "B" indicates a pulse conforming to the bipolar rule and "V" representing a pulse violating
the rule. An example of HDB3 encoding is shown in Table 6. In T1 mode and B8ZS encoding selected, an
input data sequence with eight or more consecutive zeros will be replaced using the B8ZS encoding rule. An
example with Bipolar with 8 Zero Substitution is shown in Table 7.
TABLE 5: TIMING SPECIFICATIONS FOR TCLK/TPOS/TNEG
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
TCLK Duty Cycle
TCDU
30
50
70
%
Transmit Data Setup Time
TSU
50
-
ns
Transmit Data Hold Time
THO
30
-
ns
TCLK Rise Time (10% to 90%)
TCLKR
-
40
ns
TCLK Fall Time (90% to 10%)
TCLKF
-
40
ns
TABLE 6: EXAMPLES OF HDB3 ENCODING
NUMBER OF PULSES BEFORE
NEXT 4 ZEROS
Input
0000
HDB3 (Case 1)
Odd
000V
HDB3 (Case 2)
Even
B00V
TABLE 7: EXAMPLES OF B8ZS ENCODING
CASE
PRECEDING PULSE
NEXT 8 BITS
Case 1
+
00000000
B8ZS
000VB0VB
AMI Output
+
000+-0-+
Case 2
Input
-
00000000
B8ZS
000VB0VB
AMI Output
-
000-+0+-
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