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參數(shù)資料
| 型號： | XRT83VSH314IB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 18/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU SH T1/E1/J1 14CH 304TBGA |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 14/14 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 304-BBGA |
| 供應(yīng)商設(shè)備封裝： | 304-PBGA（31x31） |
| 包裝： | 托盤 |
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XRT83VSH314
22
REV. 1.0.1
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
3.2.3.1
RLOS (Receiver Loss of Signal)
The XRT83VSH314supports both G.775 or ETSI-300-233 RLOS detection scheme.
In G.775 mode, RLOS is declared when the received signal is less than 375mV for 32 consecutive pulse
periods (typical). The device clears RLOS when the receive signal achieves 12.5% ones density with no more
than 15 consecutive zeros in a 32 bit sliding window and the signal level exceeds 425mV (typical).
In ETSI-300-233 mode the device declares RLOS when the input level drops below 375mV (typical) for more
than 2048 pulse periods (1msec).
The device exits RLOS when the input signal exceeds 425mV (typical) and has transitions for more than 32
pulse periods with 12.5% ones density with no more than 15 consecutive zero’s in a 32 bit sliding window.
ETSI-300-233 RLOS detection method is only available in Host mode.
In T1 mode RLOS is declared when the received signal is less than 320mV for 175 consecutive pulse period
(typical). The device clears RLOS when the receive signal achieves 12.5% ones density with no more than 100
consecutive zeros in a 128 bit sliding window and the signal level exceeds 425mV (typical).
3.2.3.2
EXLOS (Extended Loss of Signal)
By enabling the extended loss of signal by programming the appropriate channel register, the digital RLOS is
extended to count 4,096 consecutive zeros before declaring RLOS in T1 and E1 mode. By default, EXLOS is
disabled and RLOS operates in normal mode.
3.2.3.3
AIS (Alarm Indication Signal)
The XRT83VSH314 adheres to the ITU-T G.775 specification for an all ones pattern. The alarm indication
signal is set to "1" if an all ones pattern (at least 99.9% ones density) is present for T, where T is 3ms to 75ms
in T1 mode. AIS will clear when the ones density is not met within the same time period T. In E1 mode, the
AIS is set to "1" if the incoming signal has 2 or less zeros in a 512-bit window. AIS will clear when the incoming
signal has 3 or more zeros in the 512-bit window.
3.2.4
FLSD (FIFO Limit Status Detection)
The purpose of the FIFO limit status is to indicate when the Read and Write FIFO pointers are within a pre-
determined range (over-flow or under-flow indication). The FLSD is set to "1" if the FIFO Read and Write
Pointers are within ±3-Bits.
3.2.4.1
LCVD (Line Code Violation Detection)
The LIU contains 14 independent, 16-bit LCV counters. When the counters reach full-scale, they remain
saturated at FFFFh until they are reset globally or on a per channel basis. For performance monitoring, the
counters can be updated globally or on a per channel basis to place the contents of the counters into holding
registers. The LIU uses an indirect address bus to access a counter for a given channel. Once the contents of
the counters have been placed in holding registers, they can be individually read out from register 0xE8h 8-bits
at a time according to the BYTEsel bit in the appropriate global register. By default, the LSB byte is in register
0xE8h until the BYTEsel is pulled "High" where upon the MSB byte will be placed in the register for read back.
Once both bytes have been read, the next channel may be selected for read back.
By default, the LCV_OFD will be set to a "1" if the receiver is currently detecting line code violations or
excessive zeros for HDB3 (E1 mode) or B8ZS (T1 mode). In AMI mode, the LCVD will be set to a "1" if the
receiver is currently detecting bipolar violations or excessive zeros.
However, if the LIU is configured to
monitor the 16-bit LCV counter by programming the appropriate global register, the LCV_OFD will be set to a
"1" if the counter saturates.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83VSH314IB-F | 功能描述:外圍驅(qū)動器與原件 - PCI 14 Channel Short-Haul RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83VSH314IB-SAM | 制造商:Exar Corporation 功能描述:FOR FUJITSU ONLY |
| XRT83VSH316 | 制造商:EXAR 制造商全稱:EXAR 功能描述:16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| XRT83VSH316_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| XRT83VSH316ES | 功能描述:外圍驅(qū)動器與原件 - PCI 16 CH T1/E1LIUSH LOW COST VERSION RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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