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參數(shù)資料
型號(hào)： XRT83SL30IVTR-F
廠商： Exar Corporation
文件頁數(shù)： 53/76頁
文件大小： 0K
描述： IC LIU T1/E1/J1 SGL 64TQFP
標(biāo)準(zhǔn)包裝： 1,000
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 1/1
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-TQFP（10x10）
包裝： 帶卷 (TR)
XRT83SL30
54
REV. 1.0.1
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TABLE 24: MICROPROCESSOR REGISTER #6 BIT DESCRIPTION
REGISTER ADDRESS
00110
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
Reserved
RUR
0
D6
DMOIS
Driver Monitor Output Interrupt Status:
This bit is set to a "1"
every time when DMO status has changed since last read.
RUR
0
D5
FLSIS
FIFO Limit Interrupt Status:
This bit is set to a "1" every time
when FIFO Limit (Read/Write pointer with +/- 3 bits apart) status
has changed since last read.
RUR
0
D4
LCVIS
Line Code Violation Interrupt Status:
This bit is set to a "1"
every time when LCV status has changed since last read.
RUR
0
D3
NLCDIS
Network Loop-Code Detection Interrupt Status:
This bit is set
to a "1" every time when NLCD status has changed since last
read.
RUR
0
D2
AISDIS
AIS Detection Interrupt Status:
This bit is set to a "1" every
time when AISD status has changed since last read.
RUR
0
D1
RLOSIS
Receive Loss of Signal Interrupt Status:
This bit is set to a "1"
every time RLOS status has changed since last read.
RUR
0
D0
QRPDIS
Quasi-Random Pattern Detection Interrupt Status:
This bit is
set to a "1" every time when QRPD status has changed since
last read.
RUR
0
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