- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10009 > XRT83SL30IVTR-F (Exar Corporation)IC LIU T1/E1/J1 SGL 64TQFP PDF資料下載
參數(shù)資料
| 型號： | XRT83SL30IVTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 14/76頁 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1/J1 SGL 64TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-TQFP（10x10） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當(dāng)前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁
XRT83SL30
18
REV. 1.0.1
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
In Host mode the programming is achieved through the corresponding interface control bits, the state of the
CLKSEL[2:0] control bits and the state of the MCLKRATE interface control bit.
RECEIVER
RECEIVER INPUT
At the receiver input, a cable attenuated AMI signal can be coupled to the receiver through a capacitor or a 1:1
transformer. The input signal is first applied to a selective equalizer for signal conditioning. The maximum
equalizer gain is up to 15dB for T1 and E1 modes. The equalized signal is subsequently applied to a peak
detector which in turn controls the equalizer settings and the data slicer. The slicer threshold for both E1 and
T1 is typically set at 50% of the peak amplitude at the equalizer output. After the slicers, the digital
representation of the AMI signals are applied to the clock and data recovery circuit. The recovered data
subsequently goes through the jitter attenuator and decoder (if selected) for HDB3 or B8ZS decoding before
being applied to the RPOS/RDATA and RNEG/LCV pins. Clock recovery is accomplished by a digital phase-
locked loop (DPLL) which does not require any external components and can tolerate high levels of input jitter
that meets or exceeds the ITU-G.823 and TR-TSY000499 standards.
In Hardware mode only, this receive channel is turned on upon power-up and is always on. In Host mode, the
receiver can be turned on or off with the RXON bit. SEE”MICROPROCESSOR REGISTER #2 BIT
TABLE 1: MASTER CLOCK GENERATOR
MCLKE1
K
HZ
MCLKT1
K
HZ
CLKSEL2
CLKSEL1
CLKSEL0
MCLKRATE
MASTER CLOCK
K
HZ
2048
0
2048
0
1
1544
2048
1544
0
2048
1544
0
1
1544
0
1
0
2048
1544
0
1
1544
8
x
0
1
0
2048
8
x
0
1
0
1
1544
16
x
0
1
0
2048
16
x
0
1
1544
56
x
1
0
2048
56
x
1
0
1
1544
64
x
1
0
1
0
2048
64
x
1
0
1
1544
128
x
1
0
2048
128
x
1
0
1
1544
256
x
1
0
2048
256
x
1
1544
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT7298IWTR | IC LINE TX DS3/STS-1 E3 28SOJ |
| VE-BNT-MX-B1 | CONVERTER MOD DC/DC 6.5V 75W |
| VE-BNP-MX-B1 | CONVERTER MOD DC/DC 13.8V 75W |
| LTC1334CNW | IC CMOS TXRX MULTIPROTOCOL 28DIP |
| VE-BNN-MX-B1 | CONVERTER MOD DC/DC 18.5V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83SL314 | 制造商:EXAR 制造商全稱:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| XRT83SL314_05 | 制造商:EXAR 制造商全稱:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| XRT83SL314ES | 功能描述:LIN 收發(fā)器 14 CHT1/E1 LIUSH RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
| XRT83SL314IB | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83SL314IB-F | 功能描述:LIN 收發(fā)器 RoHS:否 制造商:NXP Semiconductors 工作電源電壓: 電源電流: 最大工作溫度: 封裝 / 箱體:SO-8 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。