REV. 1.0.7 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT D2 BYTEsel LCV Counter Byte Select This bit is used to select the MSB" />
參數(shù)資料
型號: XRT83SH38IB-F
廠商: Exar Corporation
文件頁數(shù): 69/78頁
文件大小: 0K
描述: IC LIU SH T1/E1/J1 8CH 225BGA
標準包裝: 84
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 8/8
規(guī)程: T1,E1,J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 225-BGA
供應(yīng)商設(shè)備封裝: 225-BGA(19x19)
包裝: 托盤
XRT83SH38
68
REV. 1.0.7
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
D2
BYTEsel
LCV Counter Byte Select
This bit is used to select the MSB or LSB for Reading the contents
of the LCV counter for a given channel. The channel is addressed
by using bits D[3:0] in register 0x8Ch. By default, the LSB byte is
selected.
0 = Low Byte
1 = High Byte
R/W
0
D1
chUPDATE LCV Counter Update Per Channel
This bit is used to latch the contents of the counter for a given
channel into a holding register so that the value of the counter can
be read. The channel is addressed by using bits D[3:0] in register
0x8Ch.
0 = Normal Operation
1 = Updates the Selected Channel
R/W
0
D0
chRESET
LCV Counter Reset Per Channel
This bit is used to reset the LCV counter of a given channel to its
default state 0000h. The channel is addressed by using bits D[3:0]
in register 0x8Ch. This bit must be set to "1" for 1
S.
0 = Normal Operation
1 = Resets the Selected Channel
R/W
0
TABLE 43: MICROPROCESSOR REGISTER 0X8EH BIT DESCRIPTION
GLOBAL REGISTER (0X8EH)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
D6
D5
D4
D3
D2
D1
D0
LCVCNT7
LCVCNT6
LCVCNT5
LCVCNT4
LCVCNT3
LCVCNT2
LCVCNT1
LCVCNT0
Line Code Violation Byte Contents
These bits contain the LCV counter contents of the Byte selected
by bit D2 in register 0x8Dh for a given channel. The channel is
addressed by using bits D[3:0] in register 0x8Ch. By default, the
contents contain the LSB, however no channel is selected..
R/W
0
TABLE 42: MICROPROCESSOR REGISTER 0X8DH BIT DESCRIPTION
GLOBAL REGISTER (0X8DH)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
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