
XRT83SH38
51
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.7
REGISTER INFORMATION
TABLE 20: MICROPROCESSOR REGISTER ADDRESS (ADDR[7:0])
REGISTER
NUMBER
ADDRESS (HEX)
FUNCTION
0 - 15
0x00 - 0x0F
Channel 0 Control Registers
16 - 31
0x10 - 0x1F
Channel 1 Control Registers
32 - 47
0x20 - 0x2F
Channel 2 Control Registers
48 - 63
0x30 - 0x3F
Channel 3 Control Registers
64 - 79
0x40 - 0x4F
Channel 4 Control Registers
80 - 95
0x50 - 0x5F
Channel 5 Control Registers
96 - 111
0x60 - 0x6F
Channel 6 Control Registers
112 - 127
0x70 - 0x7F
Channel 7 Control Registers
128 - 142
0x80 - 0x8E
Global Control Registers Applied to All 8 Channels
192
0xC0
Global Control Register Applied to All 8 Channels
143 - 253
0x8F - 0xFD
R/W Registers Reserved for Testing (Except 0xC0h)
254
0xFE
Device "ID"
255
0xFF
Device "Revision ID"
TABLE 21: MICROPROCESSOR REGISTER CHANNEL DESCRIPTION
REG ADDR TYPE
D7
D6
D5
D4
D3
D2
D1
D0
Channel 0 Control Registers (0x00 - 0x0F)
0
0x00
R/W
QRSS/PRBS
PRBS_Rx/Tx
RxON
EQC4
EQC3
EQC2
EQC1
EQC0
1
0x01
R/W
RxTSEL
TxTSEL
TERSEL1
TERSEL0
JASEL1
JASEL0
JABW
FIFOS
2
0x02
R/W
INVQRSS
TxTEST2
TxTEST1
TxTEST0
TxON
LOOP2
LOOP1
LOOP0
3
0x03
R/W
Reserved
CODES
RxRES1
RxRES0
INSBPV
INSBER
Reserved
4
0x04
R/W
Reserved
DMOIE
FLSIE
LCVI/OFE
Reserved
AISDIE
RLOSIE
QRPDIE
5
0x05
RO
Reserved
DMO
FLS
LCV/OF
Reserved
AIS
RLOS
QRPD
6
0x06
RUR
Reserved
DMOIS
FLSIS
LCV/OFIS
Reserved
AISIS
RLOSIS
QRPDIS
7
0x07
RO
Reserved
8
0x08
R/W
Reserved
1SEG6
1SEG5
1SEG4
1SEG3
1SEG2
1SEG1
1SEG0
9
0x09
R/W
Reserved
2SEG6
2SEG5
2SEG4
2SEG3
2SEG2
2SEG1
2SEG0
10
0x0A
R/W
Reserved
3SEG6
3SEG5
3SEG4
3SEG3
3SEG2
3SEG1
3SEG0
11
0x0B
R/W
Reserved
4SEG6
4SEG5
4SEG4
4SEG3
4SEG2
4SEG1
4SEG0
12
0x0C
R/W
Reserved
5SEG6
5SEG5
5SEG4
5SEG3
5SEG2
5SEG1
5SEG0
13
0x0D
R/W
Reserved
6SEG6
6SEG5
6SEG4
6SEG3
6SEG2
6SEG1
6SEG0
14
0x0E
R/W
Reserved
7SEG6
7SEG5
7SEG4
7SEG3
7SEG2
7SEG1
7SEG0