參數(shù)資料
型號: XRT83L314IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA304
封裝: TBGA-304
文件頁數(shù): 51/84頁
文件大?。?/td> 631K
代理商: XRT83L314IB
XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
47
5.3
If the LIU is interfaced to a Motorola type μP, it should be configured to operate in the Motorola mode. Motorola
type programmed I/O Read and Write operations are described below.
Motorola Mode Read Cycle
Whenever a Motorola type μP wishes to read the contents of a register, it should do the following.
1.
Place the address of the target register on the address bus input pins ADDR[10:0].
2.
While the μP is placing this address value on the address bus, the address decoding circuitry should
assert the CS pin of the LIU, by toggling it "Low". This action enables further communication between the
μP and the LIU microprocessor interface block.
3.
The μP should then toggle the TS pin "Low". This step causes the LIU to latch the contents of the address
bus into its internal circuitry. At this point, the address of the register has now been selected.
4.
Next, the μP should indicate that this current bus cycle is a Read operation by pulling the R/W input pin
"High".
5.
Toggle the WE input pin "Low". This action enables the bi-directional data bus output drivers of the LIU.
6.
After the μP toggles the WE signal "Low", the LIU will toggle the TA output pin "Low". The LIU does this in
order to inform the μP that the data is available to be read by the μP, and that it is ready for the next com-
mand.
7.
After the μP detects the TA signal and has read the data, it can terminate the Read Cycle by toggling the
WE input pin "High".
Motorola Mode Write Cycle
Whenever a motorola type μP wishes to write a byte or word of data into a register within the LIU, it should do
the following.
1.
Place the address of the target register on the address bus input pins ADDR[10:0].
2.
While the μP is placing this address value on the address bus, the address decoding circuitry should
assert the CS pin of the LIU, by toggling it "Low". This action enables further communication between the
μP and the LIU microprocessor interface block.
3.
The μP should then toggle the TS pin "Low". This step causes the LIU to latch the contents of the address
bus into its internal circuitry. At this point, the address of the register has now been selected.
4.
Next, the μP should indicate that this current bus cycle is a Write operation by pulling the R/W input pin
"Low".
5.
Toggle the WE input pin "Low". This action enables the bi-directional data bus output drivers of the LIU.
6.
After the μP toggles the WE signal "Low", the LIU will toggle the TA output pin "Low". The LIU does this in
order to inform the μP that the data has been written into the internal register location, and that it is ready
for the next command.
7.
After the μP detects the TA signal and has read the data, it can terminate the Read Cycle by toggling the
WE input pin "High".
The Motorola Read and Write timing diagram is shown in Figure 43. The timing specifications are shown in
Table 19.
M
OTOROLA
M
ODE
P
ROGRAMMED
I/O A
CCESS
(S
YNCHRONOUS
)
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