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參數(shù)資料
型號: XRT83L30IV-F
廠商: Exar Corporation
文件頁數(shù): 55/78頁
文件大小: 0K
描述: IC LIU LH/SH T1/E1 SGL 64TQFP
標(biāo)準(zhǔn)包裝: 160
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: T1,E1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-TQFP(10x10)
包裝: 托盤
其它名稱: 1016-1633
XRT83L30IV-F-ND
XRT83L30
56
REV. 1.0.1
SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TABLE 25: MICROPROCESSOR REGISTER #7 BIT DESCRIPTION
REGISTER ADDRESS
00111
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
Reserved
RO
0
D6
Reserved
RO
0
D5
CLOS5
Cable Loss bit 5:
CLOS[5:0] are the six bits receiver for selec-
tive equalizer setting which is also a binary word that represents
the cable attenuation indication within ±1dB. CLOS5 is the most
significant bit (MSB) and CLOS0 is the least significant bit (LSB).
RO
0
D4
CLOS4
Cable Loss bit 4:
See description of D5 for function of this bit.
RO
0
D3
CLOS3
Cable Loss bit 3:
See description of D5 for function of this bit.
RO
0
D2
CLOS2
Cable Loss bit 2:
See description of D5 for function of this bit.
RO
0
D1
CLOS1
Cable Loss bit 1:
See description of D5 for function of this bit.
RO
0
D0
CLOS0
Cable Loss bit 0:
See description of D5 for function of this bit.
RO
0
TABLE 26: MICROPROCESSOR REGISTER #8 BIT DESCRIPTION
REGISTER ADDRESS
01000
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
Reserved
R/W
0
D6-D0
B6S1 - B0S1 Arbitrary Transmit Pulse Shape, Segment 1
The shape of the transmitted pulse can be made user program-
mable by selecting "Arbitrary Pulse" mode, see
Table 5. The
arbitrary pulse is divided into eight time segments whose com-
bined duration is equal to one period of MCLK.
This 7 bit number represents the amplitude of the arbitrary pulse
during the first time segment. B6S1 -B0S1 is in signed magni-
tude format with B6S1 as the sign bit and B0S1 as the least sig-
nificant bit (LSB).
R/W
0
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