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XRT83L30
46
REV. 1.0.1
SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TABLE 19: MICROPROCESSOR REGISTER #1 BIT DESCRIPTION
REGISTER ADDRESS
00001
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
RXTSEL
Receiver Termination Select:
In Host mode, this bit is used to
select between the internal and external line termination modes
for the receiver according to the following table:
R/W
0
D6
TXTSEL
Transmit Termination Select:
In Host mode, this bit is used to
select between the internal and external line termination modes
for the transmitter according to the following table:
R/W
0
D5
TERSEL1
Termination Impedance Select bit 1:
In the Host mode and in the internal termination mode (TXT-
SEL=”1” and RXTSEL=”1”), TERSEL[1:0] control the transmit
and receive termination impedance according to the following
table:
In the internal termination mode, the receiver termination of each
receiver is realized completely by internal resistors or by the
combination of internal and one fixed resistor (see description for
RXRES[1:0] bits).
In the internal termination mode, the transmitter output should be
AC coupled to the transformer.
R/W
0
D4
TERSEL0
Termination Impedance Select bit 0:
See description of bit D5 for the function of this bit.
R/W
0
RXTSEL
RX Termination
0
1
External
Internal
TXTSEL
TX Termination
0
1
External
Internal
0
1
0
1
0
100
110
75
120
Termination
TERSEL1
TERSEL0