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參數(shù)資料
型號: XRT83L30IV-F
廠商: Exar Corporation
文件頁數(shù): 49/78頁
文件大?。?/td> 0K
描述: IC LIU LH/SH T1/E1 SGL 64TQFP
標(biāo)準(zhǔn)包裝: 160
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: T1,E1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-TQFP(10x10)
包裝: 托盤
其它名稱: 1016-1633
XRT83L30IV-F-ND
XRT83L30
50
REV. 1.0.1
SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TABLE 21: MICROPROCESSOR REGISTER #3 BIT DESCRIPTION
REGISTER ADDRESS
00011
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
NLCDE1
Network Loop Code Detection Enable bit 1:
This bit together with NLCDE0, Control the Loop-Code detection
according to the following table:
When NLCDE1=”0” and NCLDE0=”1”, or NLCDE1=”1” and
NLCDE0=”0”, the chip is manually programed to monitor the
receive data for the Loop-Up or Loop-Down code respectively.
When the presence of the “00001” or “001” pattern is detected for
more than 5 seconds, the status of the NLCD bit is set to “1” and
if the NLCD interrupt is enabled an interrupt is initiated. The Host
has the option to control the Loop-Back function manually.
Setting the NLCDE1=”1” and NLCDE0=”1” enables the Auto-
matic Loop-Code detection and Remote-Loop-Back activation
mode. As this mode is initiated, the state of the NLCD interface
bit is reset to “0” and the chip is programmed to monitor the
receive data for the Loop-Up Code. If the “00001” pattern is
detected for longer than 5 seconds, the NLCD bit is set to “1”,
Remote Loop-Back is activated and the chip is automatically pro-
gramed to monitor the receive data for the Loop-Down code. The
NLCD bit stays set even after the chip stops receiving the Loop-
Up code. The remote Loop-Back condition is removed when the
chip receives the Loop-Down code for more than 5 seconds or if
the Automatic Loop-Code detection mode is terminated.
R/W
0
D6
NLCDE0
Network Loop Code Detection Enable bit 0:
See description
of bit D7 for the function of this bit.
R/W
0
D5
CODES
ENCODING and DECODING SELECT:
Writing a “0” to this bit selects HDB3 or B8ZS encoding and
decoding. Writing a “1” selects an AMI coding scheme.This bit is
only active when single-rail mode is selected.
R/W
0
NLCDE1
NLCDE0
Function
0
Disable Loop-Code
Detection
0
1
Detect Loop-Up Code in
Receive Data
1
Automatic Loop-Code
Detection
1
0
Detect Loop-Down Code in
Receive Data
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