參數(shù)資料
型號(hào): XRT75R12DIB-L
廠商: Exar Corporation
文件頁數(shù): 63/133頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 12CH 420TBGA
標(biāo)準(zhǔn)包裝: 40
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 12/12
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 420-LBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 420-TBGA(35x35)
包裝: 托盤
XRT75R12D
31
REV. 1.0.3
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
5.0
DIAGNOSTIC FEATURES
5.1
PRBS Generator and Detector
The XRT75R12D contains an on-chip Pseudo Random Binary Sequence (PRBS) generator and detector for
diagnostic purpose. With the PRBSEN_n bit = “1”, the transmitter will send out PRBS of 223-1 in E3 rate or
215-1 in STS-1/DS3 rate. At the same time, the receiver PRBS detector is also enabled. When the correct
PRBS pattern is detected by the receiver, the RNEG/LCV pin will go “Low” to indicate PRBS synchronization
has been achieved. When the PRBS detector is not in sync the PRBSLS bit will be set to “1” and RNEG/LCV
pin will go “High”.
With the PRBS mode enabled, the user can also insert a single bit error by toggling “INSPRBS” bit. This is
done by writing a “1” to INSPRBS bit. The receiver at RNEG/LCV pin will pulse “High” for one RxClk cycle for
every bit error detected. Any subsequent single bit error insertion must be done by first writing a “0” to
INSPRBS bit and followed by a “1”.
Figure 17 shows the status of RNEG/LCV pin when the XRT75R12D is configured in PRBS mode.
NOTE: In PRBS mode, the device is forced to operate in Single-Rail Mode.
FIGURE 17. PRBS MODE
RxClk
RxNEG/LCV
SYNC LOSS
PRBS SYNC
Single Bit Error
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