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參數(shù)資料
| 型號： | XRD98L63AIV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 13/41頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCD DIGITIZER 12BIT 48TQFP |
| 標準包裝： | 250 |
| 位數(shù)： | 12 |
| 通道數(shù)： | 1 |
| 電壓 - 電源，模擬： | 2.7 V ~ 3.6 V |
| 電壓 - 電源，數(shù)字： | 2.7 V ~ 3.6 V |
| 封裝/外殼： | 48-TQFP |
| 供應商設備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
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XRD98L63
20
Rev.1.01
CDS
12-bit ADC
Hot Pixel
C lipper
Pixel
Averager
+
-
+
Even & Odd
Coarse
Accumulators
Even & Odd
Fine
Accumulators
Offset Calibration Logic
PGA
Reg
Hold
OB[7:0]
Gain[9:0]
DB[11:0]
CDAC
FDAC
+
B lack Level
O ffset Calibration
Loop
DNS[1:0]
ManCAL
CDE, CDO
From Serial
Interface
Registers
CCD
signal
W L[11:0]
Mode
DNS
Filter
FDE, FDO
OBL[11:0]
Gain[9:0]
Avg[1:0]
OBdel[2:0]
From Gain Logic
Figure 12. Detailed Block Diagram of the Black Level Offset Calibration Logic
Offset Difference
Next, the Offset register value, OB[7:0], is subtracted
from the OB pixel average. If the difference is positive,
the offset DACs are adjusted to reduce the effective
ADC output code. If the difference is negative, the
offset DACs are adjusted to increase the effective ADC
output code. The DNS option will affect how the DAC
adjustments are made.
Coarse & Fine Accumulators
The Coarse and Fine Accumulators are the registers
which hold the digital codes for the Coarse and Fine
Offset DACs. The Offset DAC adjustments are made
by adding to or subtracting from the value in the Fine
accumulator. If there is an overflow or underflow in the
Fine Accumulator, the Fine Accumulator is reset to it’s
mid-scale value, and the Coarse Accumulator is
incremented or decremented accordingly.
In the Multiple Gain Mode, there are separate accumu-
lators for even and odd lines.
DNS[1]
DNS[0]
DNS Filter Width
0
OFF
0
1
Narrow (default)
1
0
Medium
1
Wide
Calibration Options
Digital Noise Suppression (DNS) Filter
The purpose of this option is to eliminate small
changes in the Black Level offset by making the
calibration system less sensitive to small changes in
the measured offset. In this mode, the user has the
option of selecting from three filter settings, see Table 5.
Table 5. DNS Threshold Programming
To activate the Digital Noise Suppression mode, write
to the DNS[1:0] bits in the Calibration register.
By default, the Digital Noise Suppression is ON and set
to the narrow filter width.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRD98L63AIVTR-F | 制造商:Exar Corporation 功能描述:AFE General Purpose 1ADC 12-Bit 3V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XRD98L63AIVTR-F |
| XRD98L63EVAL | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Eval Board for XRD98L63AIV RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| XRD98L63ZEVAL | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Eval Board (Solder) XRD98L63AIV RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| XRDAN27 | 制造商:EXAR 制造商全稱:EXAR 功能描述:Compensating for Zero Order Hold Effects |
| XRDAN28 | 制造商:EXAR 制造商全稱:EXAR 功能描述:Frequency Response Effects of Overampling and Averaging on A/D Output Data |
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