- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376440 > X40239 (Intersil Corporation) Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP PDF資料下載
參數(shù)資料
| 型號(hào)： | X40239 |
| 廠商： | Intersil Corporation |
| 英文描述： | Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP |
| 中文描述： | 三電壓監(jiān)測器，葡萄牙，2千比特EEPROM存儲(chǔ)器，以及單/雙副處長 |
| 文件頁數(shù)： | 10/36頁 |
| 文件大?。?/td> | 541K |
| 代理商： | X40239 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
10
FN8115.0
April 11, 2005
Depending upon the operation to be performed on
each of these individual parts, a 1, 2 or 3 Byte protocol
is used. All operations however must begin with the
Slave Address Byte being issued on the SDA pin. The
Slave address selects the part of the X4023x to be
addressed, and specifies if a Read or Write operation
is to be performed.
It should be noted that in order to perform a write oper-
ation to either a DCP or the EEPROM array, the Write
Enable Latch (WEL) bit must first be set (See “BL1,
BL0: Block Lock protection bits - (Nonvolatile)” on
page 18.)
Slave Address Byte
Following a START condition, the master must output
a Slave Address Byte (Refer to Figure 4). This byte
consists of three parts:
—The Device Type Identifier which consists of the most
significant four bits of the Slave Address (SA7 - SA4).
The Device Type Identifier must always be set to 1010
in order to select the X4023x.
—The next three bits (SA3 - SA1) are the Internal Device
Address bits. Setting these bits to 000 internally
selects the EEPROM array, while setting these bits to
111 selects the DCP structures in the X4023x. The CR
Register may be selected using the Internal Device
Address 010.
—The Least Significant Bit of the Slave Address (SA0)
Byte is the R/W bit. This bit defines the operation to be
performed on the device being addressed (as defined
in the bits SA3 - SA1). When the R/W bit is “1”, then a
READ operation is selected. A “0” selects a WRITE
operation (Refer to Figure 4)
Nonvolatile Write Acknowledge Polling
After a nonvolatile write command sequence (for either
the EEPROM array, the Non Volatile Memory of a DCP
(NVM), or the CR Register) has been correctly issued
(including the final STOP condition), the X4023x ini-
tiates an internal high voltage write cycle. This cycle
typically requires 5 ms. During this time, no further
Read or Write commands can be issued to the device.
Write Acknowledge Polling is used to determine when
this high voltage write cycle has been completed.
To perform acknowledge polling, the master issues a
START condition followed by a Slave Address Byte.
The Slave Address issued must contain a valid Inter-
nal Device Address. The LSB of the Slave Address
(R/W) can be set to either 1 or 0 in this case. If the
device is still busy with the high voltage cycle then no
ACKNOWLEDGE will be returned. If the device has
completed the write operation, an ACKNOWLEDGE
will be returned and the host can then proceed with a
read or write operation. (Refer to Figure 5)
DIGITALLY CONTROLLED POTENTIOMETERS
DCP Functionality
The X4023x includes one or two independent resistor
arrays. For the 64, 100 or 256 tap XDCPs, these
arrays respectively contain 63, 99 discrete resistive
segments that are connected in series. (the 256 tap
resistor achieves an equivalent end to end resistance.)
The physical ends of each array are equivalent to the
fixed terminals of a mechanical potentiometer. At one
end of the resistor array the terminal connects to the
R
Hx
pin (x = 0,1,2).The other end of the resistor array
is connected to V
SS
inside the package.
SA6
SA7
SA5
SA3
SA2
SA1
SA0
DEVICE TYPE
IDENTIFIER
READ /
WRITE
SA4
Internal Address
(SA3 - SA1)
000
010
111
Internally Addressed
Device
EEPROM Array
CR Register
DCP
Bit SA0
0
1
Operation
WRITE
READ
R/W
Figure 4.
Slave Address Format
1
0
1
0
ADDRESS
INTERNAL
DEVICE
X40231, X40233, X40235, X40237, X40239
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X40420V14IZ-B | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40420S14IZ-A | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40420S14IZ-B | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40420S14Z-A | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40420S14Z-B | Dual Voltage Monitor with Intergrated CPU Supervisor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40239S16I-A | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40239S16I-AT1 | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40239S16I-B | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40239S16I-BT1 | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時(shí):最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X-4028-P-C32-R | 功能描述:音頻指示器及警報(bào)器 2800Hz 105dBA 32Vdc RoHS:否 制造商:PUI Audio 產(chǎn)品:Indicators 聲壓級(jí):85 dB 音調(diào):Continuous 頻率:2300 Hz +/- 300 Hz 電壓額定值:5 VDC 電流額定值:30 mA 端接類型: 直徑:12 mm 安裝:Through Hole |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。