參數(shù)資料
型號(hào)： W947D6HBHX5E
廠商： WINBOND ELECTRONICS CORP
元件分類： DRAM
英文描述： 8M X 16 DDR DRAM, 5 ns, PBGA60
封裝： 8 X 9 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-60
文件頁(yè)數(shù)： 29/60頁(yè)
文件大?。?/td> 1160K
代理商： W947D6HBHX5E
W947D6HB / W947D2HB
128Mb Mobile LPDDR
Publication Release Date:Jun,17, 2011
- 35 -
Revision A01-003
7.6.3 Write Burst (min. and max. tDQSS)
During Write bursts, the first valid data-in element will be registered on the first rising edge of DQS following the
WRITE command, and the subsequent data elements will be registered on successive edges of DQS. The Low state
of DQS between the WRITE command and the first rising edge is called the write preamble, and the Low state on
DQS following the last data-in element is called the write post-amble.
The time between the WRITE command and the first corresponding rising edge of DQS (tDQSS) is specified with a
relatively wide range - from 75% to 125% of a clock cycle. Following figure shows the two extremes of tDQSS for a
burst of 4, upon completion of a burst, assuming no other commands have been initiated, the DQs will remain high-Z
and any additional input data will be ignored.
BA,Col b
WRITE
NOP
CK
Command
Address
1) DI b = Data In to column b.
2) 3 subsequent elements of Data In are applied i nthe programmed order following DI b.
3) A non-interrupted burst of 4 is shown.
4) A10 is LOW with the WRITE command (Auto Precharge is disabled)
NOP
= Don't Care
DQS
DQ
DM
DQS
DQ
DM
tDQSSmin
tDQSSmax
7.6.4 Write to Write
Data for any WRITE burst may be concatenated with or truncated with a subsequent WRITE command. In either
case, a continuous flow of input data, can be maintained. The new WRITE command can be issued on any positive
edge of the clock following the previous WRITE command.
The first data-in element from the new burst is applied after either the last element of a completed burst or the last
desired data element of a longer burst which is being truncated. The new WRITE command should be issued X
cycles after the first WRITE command, where X equals the number of desired data-in element pairs.
相關(guān)PDF資料
PDF描述
WS57C256F-70LMB 32K X 8 UVPROM, 70 ns, CQCC32
WMS128K8C-120FEIEA 128K X 8 STANDARD SRAM, 120 ns, CDFP32
WMS128K8L-100FEIE 128K X 8 STANDARD SRAM, 100 ns, CDFP32
WMS128K8L-120FECEA 128K X 8 STANDARD SRAM, 120 ns, CDFP32
WMS128K8L-120DRIEA 128K X 8 STANDARD SRAM, 120 ns, CDSO32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W947D6HBHX5I 制造商:WINBOND 制造商全稱:Winbond 功能描述:128Mb Mobile LPDDR
W947D6HBHX5I TR 制造商:Winbond Electronics Corp 功能描述:
W947D6HBHX6E 制造商:Winbond Electronics Corp 功能描述:IC LPDDR SDRAM 128MBIT 60VFBGA
W947D6HBHX6G 制造商:WINBOND 制造商全稱:Winbond 功能描述:128Mb Mobile LPDDR
W948D2FB 制造商:WINBOND 制造商全稱:Winbond 功能描述:256Mb Mobile LPDDR
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