參數(shù)資料
型號： W3H32M64E-533SBC
廠商： MICROSEMI CORP-PMG MICROELECTRONICS
元件分類： DRAM
英文描述： 32M X 64 DDR DRAM, 0.65 ns, PBGA208
封裝： 16 X 20 MM, 1 MM PITCH, PLASTIC, BGA-208
文件頁數(shù)： 17/30頁
文件大?。?/td> 958K
代理商： W3H32M64E-533SBC
W3H32M64E-XSBX
24
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
September 2009
Rev. 11
White Electronic Designs Corp. reserves the right to change products or specications without notice.
TABLE 11 – DDR2 ICC SPECIFICATIONS AND CONDITIONS
VCC = 1.8V ±0.1V; -55°C ≤ TA ≤ 125°C
Symbol Proposed Conditions
667 CL5 533 CL4 400 CL3
Units
ICC0
Operating one bank active-precharge current;
tCK = tCK(ICC), tRC = tRC(ICC), tRAS = tRASmin(ICC); CKE is HIGH, CS# is HIGH between valid
commands; Address bus inputs are SWITCHING; Data bus inputs are SWITCHING
500
440
mA
ICC1
Operating one bank active-read-precharge current;
IOUT = 0mA; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRC = tRC (ICC), tRAS = tRASmin(ICC), tRCD
= tRCD(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus inputs are
SWITCHING; Data pattern is same as IDAD6W
600
540
520
mA
ICC2P
Precharge power-down current;
All banks idle; tCK = tCK(ICC); CKE is LOW; Other control and address bus inputs are STABLE; Data
bus inputs are FLOATING
28
mA
ICC2Q
Precharge quiet standby current;
All banks idle; tCK = tCK(ICC); CKE is HIGH, CS# is HIGH; Other control and address bus inputs are
STABLE; Data bus inputs are FLOATING
220
180
160
mA
ICC2N
Precharge standby current;
All banks idle; tCK = tCK(ICC); CKE is HIGH, CS# is HIGH; Other control and address bus inputs are
SWITCHING; Data bus inputs are SWITCHING
240
200
180
mA
ICC3P
Active power-down current;
All banks open; tCK = tCK(ICC); CKE is LOW; Other control and
address bus inputs are STABLE; Data bus inputs are FLOATING
Fast PDN Exit MRS(12) = 0
160
120
100
mA
Slow PDN Exit MRS(12) = 1
50
mA
ICC3N
Active standby current;
All banks open; tCK = tCK(ICC), tRAS = tRASMAX(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between
valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are
SWITCHING
280
240
200
mA
ICC4W
Operating burst write current;
All banks open, Continuous burst writes; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRAS =
tRASMAX(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus inputs
are SWITCHING; Data bus inputs are SWITCHING
1,000
820
640
mA
ICC4R
Operating burst read current;
All banks open, Continuous burst reads, IOUT = 0mA; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRAS
= tRASMAX(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus
inputs are SWITCHING; Data pattern is same as IDAD6W
940
780
620
mA
ICC5
Burst auto refresh current;
tCK = tCK(ICC); Refresh command at every tRFC(ICC) interval; CKE is HIGH, CS# is HIGH between
valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are
SWITCHING
880
840
800
mA
ICC6
Self refresh current;
CK and CK# at 0V; CKE 0.2V; Other control and address bus inputs
are FLOATING; Data bus inputs are FLOATING
Normal
28
mA
ICC7
Operating bank interleave read current;
All bank interleaving reads, IOUT = 0mA; BL = 4, CL = CL(ICC), AL = tRCD(ICC)-1*tCK(ICC); tCK =
tCK(ICC), tRC = tRC(ICC), tRRD = tRRD(ICC), tRCD = 1*tCK(ICC); CKE is HIGH, CS# is HIGH between valid
commands; Address bus inputs are STABLE during DESELECTs; Data pattern is same as IDAD6R;
Refer to the following page for detailed timing conditions
1,360
mA
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W3H32M64E-533SBI 制造商:Microsemi Corporation 功能描述:32M X 64 DDR2, 1.8V, 533MHZ, 208PBGA INDUSTRIAL TEMP. - Bulk
W3H32M64E-533SBM 制造商:Microsemi Corporation 功能描述:32M X 64 DDR2, 1.8V, 533MHZ, 208PBGA MIL-TEMP. - Bulk
W3H32M64E-667ES 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
W3H32M64E-667ESC 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
W3H32M64E-667ESI 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:32M x 64 DDR2 SDRAM 208 PBGA Multi-Chip Package
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