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參數(shù)資料
| 型號： | W25Q64CVZPAP |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 64M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 6 X 5 MM, GREEN, WSON-8 |
| 文件頁數(shù)： | 41/79頁 |
| 文件大?。?/td> | 1086K |
| 代理商： | W25Q64CVZPAP |
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W25Q64CV
- 46 -
DO
(IO
1)
7.2.26 Chip Erase (C7h / 60h)
The Chip Erase instruction sets all memory within the device to the erased state of all 1s (FFh). A Write
Enable instruction must be executed before the device will accept the Chip Erase Instruction (Status
Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low and shifting the
instruction code “C7h” or “60h”. The Chip Erase instruction sequence is shown in Figure 24.
The /CS pin must be driven high after the eighth bit has been latched. If this is not done the Chip Erase
instruction will not be executed. After /CS is driven high, the self-timed Chip Erase instruction will
commence for a time duration of tCE (See AC Characteristics). While the Chip Erase cycle is in progress,
the Read Status Register instruction may still be accessed to check the status of the BUSY bit. The BUSY
bit is a 1 during the Chip Erase cycle and becomes a 0 when finished and the device is ready to accept
other instructions again. After the Chip Erase cycle has finished the Write Enable Latch (WEL) bit in the
Status Register is cleared to 0. The Chip Erase instruction will not be executed if any page is protected by
the Block Protect (CMP, SEC, TB, BP2, BP1, and BP0) bits (see Status Register Memory Protection
table).
/CS
CLK
DI
(IO
0)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Mode 0
Mode 3
Instruction (C7h/60h)
High Impedance
Figure 24. Chip Erase Instruction Sequence Diagram
相關(guān)PDF資料 |
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| WMS128K8C-25CQE | 128K X 8 STANDARD SRAM, 25 ns, CDIP32 |
| WMF512K8X-150DEC5 | 512K X 8 FLASH 5V PROM, 150 ns, CDSO32 |
| WME128K8X-200DEC | 128K X 8 EEPROM 5V, 200 ns, CDSO32 |
| WMF512K8X-70FEM5 | 512K X 8 FLASH 5V PROM, 70 ns, CDFP32 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25Q64CVZPIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q64CVZPIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q64DW | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q64DWSFIG | 功能描述:IC FLASH SPI 64MBIT 16SOIC RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:SpiFlash® 標準包裝:2,500 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| W25Q64DWSFIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
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