參數(shù)資料
型號: W25B20-VSNIG
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 2M X 1 FLASH 2.7V PROM, PDSO8
封裝: 0.150 INCH, GREEN, PLASTIC, SOIC-8
文件頁數(shù): 13/36頁
文件大小: 1424K
代理商: W25B20-VSNIG
W25B40/W25B40A
- 20 -
8.2.10 Sector Erase (D8h)
The Sector Erase instruction sets all memory within a specified sector to the erased state of all 1s
(FFh). A Write Enable instruction must be executed before the device will accept the Erase Sector
Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin
low and shifting the instruction code “D8h” followed a 24-bit sector address (A23-A0) (see Figure 2a).
Please note that the W25B40 Bottom Boot version must use the last page address for sectors
2, 3, and 4 ( 003Fxx, 007Fxx and 00FFxx hex respectively). The W25B40 Top Boot version must
use the first page address for sectors 7, 8 and 9 (0700xx, 0780xx and 07C0xx hex respectively). All
other sectors may use any page address within the sector.The W25B40A may use any page address
within the sector for sector erase. The Sector Erase instruction sequence is shown in figure 11.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not
done the Sector Erase instruction will not be executed. After /CS is driven high, the self-timed Sector
Erase instruction will commence for a time duration of tSE (See AC Characteristics). While the Sector
Erase cycle is in progress, the Read Status Register instruction may still be accessed for checking the
status of the BUSY bit. The BUSY bit is a 1 during the Sector Erase cycle and becomes a 0 when the
cycle is finished and the device is ready to accept other instructions again. After the Sector Erase
cycle has finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Sector
Erase instruction will not be executed if the addressed page is protected by the Block Protect (BP2,
BP1, BP0) bits ((see Write Protection Operation table).
Figure 11. Sector Erase Instruction Sequence Diagram
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