
REV. B
–6–
ADuC824
D
Parameter
ADuC824BS
Test Conditions/Comments
Unit
LOGIC OUTPUTS (Not Including XTAL2)
2
VOH, Output High Voltage
2.4
VDD = 5 V, ISOURCE = 80
AV min
2.4
VDD = 3 V, ISOURCE = 20
AV min
VOL, Output Low Voltage
13
0.4
ISINK = 8 mA, SCLOCK, SDATA/MOSI V max
0.4
ISINK = 10 mA, P1.0 and P1.1
V max
0.4
ISINK = 1.6 mA, All Other Outputs
V max
Floating State Leakage Current
±10
A max
Floating State Output Capacitance
5
pF typ
POWER SUPPLY MONITOR (PSM)
AVDD Trip Point Selection Range
2.63
Four Trip Points Selectable in This Range V min
4.63
Programmed via TPA1–0 in PSMCON
V max
AVDD Power Supply Trip Point Accuracy
±3.5
% max
DVDD Trip Point Selection Range
2.63
Four Trip Points Selectable in This Range V min
4.63
Programmed via TPD1–0 in PSMCON
V max
DVDD Power Supply Trip Point Accuracy
±3.5
% max
WATCHDOG TIMER (WDT)
Timeout Period
0
Nine Timeout Periods in This Range
ms min
2000
Programmed via PRE3–0 in WDCON
ms max
MCU CORE CLOCK RATE
Clock Rate Generated via On-Chip PLL
MCU Clock Rate
2
98.3
Programmable via CD2–0 Bits in
kHz min
PLLCON SFR
12.58
MHz max
START-UP TIME
At Power-On
300
ms typ
From Idle Mode
1
ms typ
From Power-Down Mode
Oscillator Running
OSC_PD Bit = 0 in PLLCON SFR
Wakeup with
INT0 Interrupt
1
ms typ
Wakeup with SPI/I
2C Interrupt
1
ms typ
Wakeup with TIC Interrupt
1
ms typ
Wakeup with External RESET
3.4
ms typ
Oscillator Powered Down
OSC_PD Bit = 1 in PLLCON SFR
Wakeup with External RESET
0.9
sec typ
After External RESET in Normal Mode
3.3
ms typ
After WDT Reset in Normal Mode
3.3
Controlled via WDCON SFR
ms typ
FLASH/EE MEMORY RELIABILITY CHARACTERISTICS14
Endurance
15
100,000
Cycles min
Data Retention
16
100
Years min
POWER REQUIREMENTS
DVDD and AVDD Can Be Set
Independently
Power Supply Voltages
AVDD, 3 V Nominal Operation
2.7
V min
3.6
V max
AVDD, 5 V Nominal Operation
4.75
V min
5.25
V max
DVDD, 3 V Nominal Operation
2.7
V min
3.6
V max
DVDD, 5 V Nominal Operation
4.75
V min
5.25
V max