
57
PD62A
Data Sheet U14474EJ2V0DS00
Item
PD62
PD62A
PD64
PD64A
PD65
ROM capacity
512
× 10 bits
512
× 10 bits
1002
× 10 bits
1002
× 10 bits
2026
× 10 bits
RAM capacity
32
× 4 bits
Stack
1 level (also used as RF of RAM)
Key matrix
8
× 6 = 48 keys
8
× 7 = 56 keys
Key extension input
S0, S1
S0, S1, S2
Clock frequency
Ceramic oscillation Ceramic oscillation Ceramic oscillation Ceramic oscillation
 fX = 2.4 to 8 MHz
 fX = 2.4 to 8 MHz  fX = 2.4 to 8 MHz  fX = 2.4 to 8 MHz
 fX = 2.4 to 4 MHz
(with POC circuit)
Timer
Clock
 fX/64, fX/128
Count start
Writing count value
Carrier
Frequency
 fX/8, fX/64, fX/96 (timer clock: fX/64)
 fX/16, fX/128, fX/192 (timer clock: fX/128)
 No carrier
Output start
Synchronized with timer
Instruction execution time
16
s (fX = 4 MHz)
“MOV Rn, @R0” instruction
n = 1 to F
Standby
Reset
RESET input, POC
POC
mode
Release condition  HALT mode for timer only.
(HALT instruction)  STOP mode for only releasing KI (KI/O high-level output or KI/O0 high-level output)
Relationship between
HALT instruction not executed when F = 1
HALT instruction execution
and status flag (F)
POC circuit
 Mask option
 Provided
 Low level output to RESET pin on detection
 Internal reset signal occurs on detection
POC detec-
VPOC = 1.6 V
VPOC = 1.85 V
VPOC = 1.6 V
VPOC = 1.85 V (TYP.)
tion voltage
(TYP.)
Mask option
POC circuit only
Not provided
Power supply voltage
 VDD = 1.8 to 3.6 V
VDD = 2.0 to 3.6 V
 VDD = 1.8 to 3.6 V VDD = 2.0 to 3.6 V
 VDD = 2.2 to 3.6 V
(with POC circuit)
Operating ambient
 TA = –40 to +85
°C TA = –40 to +85°C TA = –40 to +85°C  TA = –40 to +85°C
temperature
 TA = –20 to +70
°C TA = –20 to +70°C
(with POC circuit)
Electrical specifications
Refer to each product data sheet.
Recommended soldering
conditions
Package
20-pin plastic SSOP
 20-pin plastic SOP
20-pin plastic SSOP
 20-pin plastic SSOP
One-time PROM product
PD6P4B
PD6P5
APPENDIX B. FUNCTIONAL COMPARISON BETWEEN
PD62A AND OTHER PRODUCTS