參數(shù)資料
型號(hào)： UPD62AMC-XXX-5A4-A
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝： 0.300 INCH, PLASTIC, SSOP-20
文件頁數(shù)： 40/62頁
文件大?。?/td> 272K
代理商： UPD62AMC-XXX-5A4-A
45
PD62A
Data Sheet U14474EJ2V0DS00
MOV T, @R0
<1> Instruction code:
0 01111111 1
<2> Cycle count:
1
<3> Function:
(T)
← ((P13), (R0))
The program memory contents are transferred to the timer register T (t9 to t0) specified with the control
register P13 and the register pair R10-R00.
The program memory, which consists of 10 bits, is placed in the following state after being transferred
to the register.
t9
t8
t7
t6
t5
t4
t3
t2
t1
t0
T1
T0
t1
t0
t9
t8
t7
t6
t5
t4
t3
t2
@R0
→
Program memory
Timer
T
The high-order 2 bits of the program memory address are specified with the control register (P13).
Caution When setting a timer value in the program memory, be sure to use the DT directive.
9.10 Others
HALT #data4
<1> Instruction code:
0 00101000 1
:
0 00000 d3 d2 d1 d0
<2> Cycle count:
1
<3> Function:
Standby mode
Places the CPU in standby mode.
The condition for having the standby mode (HALT/STOP mode) canceled is specified with the immediate
data.
STTS R0n
<1> Instruction code:
0 00110 R3 R2 R1 R0
<2> Cycle count:
1
<3> Function:
If statuses match
F
← 1
else
F
← 0 n = 0 to F
The S0, S1, KI/O, KI, and TIMER statuses are compared with the register R0n contents. If at least one
of the statuses coincides with the bits that have been set, the status flag F is set (to 1).
If none of them coincide, the status flag F is cleared (to 0).
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