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參數(shù)資料
| 型號： | UPD62AMC-XXX-5A4-A |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 0.300 INCH, PLASTIC, SSOP-20 |
| 文件頁數(shù)： | 27/62頁 |
| 文件大?。?/td> | 272K |
| 代理商： | UPD62AMC-XXX-5A4-A |
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33
PD62A
Data Sheet U14474EJ2V0DS00
Input/output Instructions
Mnemonic
Operand
Instruction Code
Operation
Instruction
1st Word
2nd Word
3rd Word
Length
Cycle
IN
A, P0n
FFF8 + n
—
(A)
← (Pmn) m = 0, 1 n = 0, 1, 3, 4
1
A, P1n
FEF8 + n
—
CY
← 0
OUT
P0n, A
E5F8 + n
—
(Pmn)
← (A) m = 0, 1 n = 0, 1, 3, 4
P1n, A
E4F8 + n
—
ANL
A, P0n
FBF8 + n
—
(A)
← (A) ∨ (Pmn) m = 0, 1 n = 0, 1, 3, 4
A, P1n
FAF8 + n
—
CY
← A3 Pmn3
ORL
A, P0n
FDF8 + n
—
(A)
← (A) ∨ (Pmn) m = 0, 1 n = 0, 1, 3, 4
A, P1n
FCF8 + n
—
CY
← 0
XRL
A, P0n
F5F8 + n
—
(A)
← (A) ∨ (Pmn) m = 0, 1 n = 0, 1, 3, 4
A, P1n
F4F8 + n
—
CY
← A3 Pmn3
Mnemonic
Operand
Instruction Code
Operation
Instruction
1st Word
2nd Word
3rd Word
Length
Cycle
OUT
Pn, #data8 E6F8 + n
data8
(Pn)
← data8
n = 0, 1, 3, 4
2
1
Remark
Pn: P1n to P0n are dealt with in pairs.
Data Transfer Instruction
Mnemonic
Operand
Instruction Code
Operation
Instruction
1st Word
2nd Word
3rd Word
Length
Cycle
MOV
A, R0n
FFEn
(A)
← (Rmn)
m = 0, 1
n = 0 to F
1
A, R1n
FEEn
CY
← 0
A, @R0H
FEF0
(A)
← ((P13), (R0))7-4
CY
← 0
A, @R0L
FFF0
(A)
← ((P13), (R0))3-0
CY
← 0
A, #data4
FFF1
data4
(A)
← data4
2
CY
← 0
R0n, A
E5En
(Rmn)
← (A)
m = 0, 1
n = 0 to F
1
R1n, A
E4En
Mnemonic
Operand
Instruction Code
Operation
Instruction
1st Word
2nd Word
3rd Word
Length
Cycle
MOV
Rn, #data8
E6En
data8
—
(R1n-R0n)
← data8
n = 0 to F
2
1
Rn, @R0
E7En
—
(R1n-R0n)
← ((P13), (R0)) n = 1 to F
1
Remark
Rn: R1n to R0n are dealt with in pairs.
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