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參數(shù)資料
| 型號： | TXC-02050-AIPL |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | MRT Device 6-,8-,34-Mbit Line Interface TXC-0250 |
| 中文描述： | 捷運設(shè)備6 - ，8 - ,34 - Mbit的線路接口晶技- 0250 |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 134K |
| 代理商： | TXC-02050-AIPL |
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MRT
TXC-02050-MB
Ed. 3, April 1994
TIMING CHARACTERISTICS
Detailed timing diagrams for the MRT are illustrated in Figures 3 through 9. All output times are measured with
maximum load capacitance appropriate for the pin type. Timing parameters are measured at (V
OH
- V
OL
)/2 or
(V
IH
- V
IL
)/2 as applicable.
Line Side Timing Characteristics
The line side timing characteristics of the MRT are designed so that the line output mask at the transformer
output meets the wave shapes specified in CCITT recommendation G.703 for 34 and 8 Mbit/s operation and
the NTT Technical Reference for High Speed Digital Leased Circuit Service for 6 Mbit/s operation. The pulse
masks for each of the three modes of operation are shown in Figures 3, 4, and 5. Refer to the corresponding
standard cited in each case for further details regarding the interface.
Figure 3. Pulse Mask at the 34368 kbit/s Interface
17 ns
(14.55 + 2.45)
V
1.0
0.5
0
8.65 ns
(14.55 - 5.90)
14.55 ns
12.1 ns
(14.55 - 2.45)
24.5 ns
(14.55 + 9.95)
29.1 ns
(14.55 + 14.55)
Nominal pulse
0
0
0
0
0
Reference: CCITT Recommendation G.703
0
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TXC-02050AIPL/S | 制造商:Transwitch Corporation 功能描述: |
| TXC-02050C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MRT Device 6-,8-,34-Mbit Line Interface TXC-0250C |
| TXC-02050CIPL | 制造商:Transwitch Corporation 功能描述:MRT Device 44-Pin PLCC |
| TXC-02050-CIPL | 制造商:Transwitch Corporation 功能描述:DATACOM, HDB3 ENCODER/DECODER, PQCC44 |
| TXC0-2200-003 | 制造商:Vishay Dale 功能描述: |
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