參數(shù)資料
型號(hào): TVP5145
英文描述: NTSC/PAL/SECAM/Component Digital Video Decoder With Macrovision(TM) Detection
中文描述: 的NTSC / PAL / SECAM制式/分量數(shù)字視頻解碼器通過(guò)Macrovision(TM)的檢測(cè)
文件頁(yè)數(shù): 43/92頁(yè)
文件大?。?/td> 525K
代理商: TVP5145
2
27
2.9
Raw Video Data Output
The TVP5145 device can output raw A/D video data at twice the sampling rate for external VBI slicing. This is
transmitted as an ancillary data block, although a bit differently from the way the sliced VBI data is transmitted in the
FIFO format as described in Section 2.8.1. First, the samples are transmitted during the active portion of the line. The
ITU-R BT.656 specification requires that a preamble code of 00h FFh FFh ZZh be transmitted where, if ZZh is anything
other that 15h, it indicates the presence of ancillary data immediately following the preamble. The TVP5145 device
outputs ZZh = 60h. Also, a preamble of 00h FFh FFh 15h must be inserted after the ancillary data to indicate that
the remainder if the line is available for the insertion of further ancillary signals.
2.10 Reset and Initialization
Reset is initiated at power up or any time terminal 23 (RSTINB) is brought low. Table 2
8 describes the status of the
TVP5145 terminals during and immediately after reset.
Table 2
8. Reset Sequence
SIGNAL NAME
DURING RESET
RESET COMPLETED
Y[9:0], UV[9:0], HSYN,
VSYN, FID, PALI
Input
High-impedance if AVID is pulled down during reset.
Active output if AVID is pulled up during reset.
AVID
Input
High-impedance if AVID is pulled down during reset.
Active output if AVID is pulled up during reset.
SCLK, PCLK
High-impedance if PREF is pulled down during reset.
Active if PREF is pulled up during reset.
Active output
PREF
Input
Active output
GLCO
Input
Active output
VC0
High-impedance
High-impedance
D[7:0]
Input
High-impedance
A[1:0] in PHI mode
RSTINB, SDA, SCL, I2CA,
OEB, GPCL
Input
Input
Input
Input
After hardware reset, the register 7Fh must be written with any data in order to start the operation of the TVP5145
device.
2.11 Internal Control Registers
The TVP5145 device is initialized and controlled by a set of internal registers which set all the device operating
parameters. Communication between and the external controller and the TVP5145 device is through a standard host
port
.
Table 2
9 shows the summary of these registers. The reserved registers must not be written. However, reserved
bits in the defined registers must be written with 0s. The detailed programming information of each register is
described in the following sections.
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