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參數(shù)資料
| 型號(hào)： | TVP5145 |
| 英文描述： | NTSC/PAL/SECAM/Component Digital Video Decoder With Macrovision(TM) Detection |
| 中文描述： | 的NTSC / PAL / SECAM制式/分量數(shù)字視頻解碼器通過Macrovision（TM）的檢測(cè) |
| 文件頁數(shù)： | 35/92頁 |
| 文件大小： | 525K |
| 代理商： | TVP5145 |
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2
–
19
Table 2
–
2. EAV and SAV Sequence
8-BIT DATA
D6
10-BIT DATA
D1
D9 (MSB)
D8
D7
D5
D4
D3
D2
D0
Preamble
1
1
1
1
1
1
1
1
1
1
Preamble
0
0
0
0
0
0
0
0
0
0
Preamble
0
0
0
0
0
0
0
0
0
0
Status word
1
F
V
H
P3
P2
P1
P0
0
0
2.7
Host Interface
Communication with the TVP5145 device is via an interface which is configurable at power up and reset to support
an I
2
C or PHI bus host. The host interface accesses status and control registers and retrieves sliced VBI data. The
host interface also initializes the TVP5145 internal microprocessor. The host port mode is selected by attaching
external pullup and pulldown resistors to terminals 31 (GLCO), 32 (PALI), and 33 (FID). The TVP5145 device samples
the states of these terminals at power up or at the trailing edge of RSTINB and configures the host port accordingly.
Table 2
–
3 shows the pullup/pulldown combinations required to select each of the host port modes.
Table 2
–
3. Host Port Select
GLCO
PALI
FID
I2C
0
0
1
PHI mode A
1
0
1
PHI mode B
1
1
0
PHI mode C
NOTE: 1 is pullup and 0 is pulldown.
1
1
1
2.7.1
I
2
C Host Port Select
The I
2
C standard consists of two signals, serial input/output data line (VC1) and input clock line (VC0), which carry
information between the devices connected to the bus. A third signal (VC3) is used for slave address selection.
Although the I
2
C system can be multi-mastered, the TVP5145 device functions as a slave device only.
Both SDA and SCL are lines connected to a positive supply voltage via a 2.2-k
pullup resistor. When the bus is free,
both lines are high. The slave address select terminal (VC3) enables the use of two TVP5145 devices tied to the same
I
2
C bus. Table 2
–
4 summarizes the terminal functions of the I
2
C-mode host interface.
Table 2
–
4. I
2
C Host Port Terminal Description
SIGNAL
VC3 (I2CA)
TYPE
DESCRIPTION
I
Slave address selection
VC0 (SCL)
I
Input clock line
VC1 (SDA)
I/O (open drain)
Input/output data line
Data transfer rate on the bus is up to 400 kbits/s. The number of interfaces connected to the bus is dependent on
the bus capacitance limit of 400 pF. The data on the SDA line must be stable during the high period of the clock. During
data transfer, SDA must be held stable high or low during the high period of SCL. A high-to-low transition on the SDA
line while the SCL is high indicates an I
2
C start condition. A low-to-high transition on the SDA line while the SCL is
high indicates an I
2
C stop condition.
Every byte placed on the SDA must be 8 bits long. Each byte must be followed by an acknowledge bit. The
acknowledge related clock pulse is generated by the I
2
C master.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| TVP5145EVM | 制造商:Texas Instruments 功能描述:TVP5145EVM - Bulk |
| TVP5145PFP | 功能描述:視頻 IC NTSC/PAL/SECAM/ Comp Dig Vid Dec RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5146 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:NTSC/PAL / SECAM 4 X 10 BIT DIGITAL VIDEO DECODER WITH MACROVISION DETECTION YPBPR/RGB INPUTS 5 LINE COMB FILTER AND SCART SUPPORT |
| TVP5146_12 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:NTSC/PAL/SECAM 4x10-Bit Digital Video Decoder With Macrovision?￡a Detection, YPbPr/RGB Inputs, 5-Line Comb Filter, and SCART Support |
| TVP5146EVM | 功能描述:視頻 IC 開發(fā)工具 TVP5146 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Boards 類型:YPbPr to RGBHV Converters 工具用于評(píng)估:LMH1251 工作電源電壓:5 V |
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