參數(shù)資料
型號(hào)： TSPC603R
英文描述： TSPC603R [Updated 4/02. 44 Pages] 32-bit RISC Microprocessor. 166-300 MHz
中文描述： TSPC603R [更新4 / 02。 44頁(yè)] 32位RISC微處理器。 166-300兆赫
文件頁(yè)數(shù)： 15/44頁(yè)
文件大?。?/td> 636K
代理商： TSPC603R
15
TSPC603R
2125A
–
HIREL
–
04/02
Several methods of returning to full-power mode:
- Assert INT, SMI, or MCP interrupts
- Assert hard reset or soft reset
PLL may be disabled and SYSCLK may be removed while in sleep mode.
Return to full-power mode after PLL and SYSCLK disabled in sleep mode:
- Enable SYSCLK
- Reconfigure PLL into desired processor clock mode
- System logic waits for PLL startup and relock time (100
μ
sec)
- System logic asserts one of the sleep recovery signals (for example, INT or SMI)
Power Management Software
Considerations
Since the 603r is a dual issue processor with out-of-order execution capability, care
must be taken in how the power management mode is entered. Furthermore, nap and
sleep modes require all outstanding bus operations to be completed before the power
management mode is entered. Normally during system configuration time, one of the
power management modes would be selected by setting the appropriate HID0 mode bit.
Later on, the power management mode is invoked by setting the MSR[POW] bit. To pro-
vide a clean transition into and out of the power management mode, the
stmsr
[POW]
should be preceded by a
sync
instruction and followed by an
isync
instruction.
Power Dissipation
Notes:
1. These values apply for all valid PLL_CFG[0-3] settings and do not include output driver power (OV
DD
) or analog supply
power (AV
DD
). OV
DD
power is system dependent but is typically
≤
10% of V
DD
. Worst-case AV
DD
= 15 mW.
2. Typical power is an average value measured at V
DD
= AV
DD
= 2.5V, OV
V
= 3.3V, in a system executing typical applications
and benchmark sequences.
3. Maximum power is measured at V
DD
= 2.625V using a worst-case instruction mix.
4. To calculate the power consumption at low temperature (-55
°
C),
use a factor of 1.25
.
Table 9.
Power Dissipation
(1)(2)(3)(4)
V
DD
/A
V
DD
= 2.5
±
5%V, O
V
DD
= 3.3
±
5%V, GND = 0V, 0
°
C
≤
T
C
≤
125
°
C
CPU Clock Frequency
166 MHz
200 MHz
233 MHz
266 MHz
300 MHz
Units
Full-on Mode (DPM Enabled)
Typical
2.1
2.5
3.0
3.5
4.0
W
Max
3.2
4.0
4.6
5.3
6.0
W
Doze Mode
Typical
1.5
1.7
1.8
2.0
2.1
W
Nap Mode
Typical
100
120
140
160
180
mW
Sleep Mode
Typical
96
110
123
135
150
mW
Sleep Mode-PLL Disabled
Typical
60
60
60
60
60
mW
Sleep Mode-PLL and SYSCLK Disabled
Typical
25
25
25
25
25
mW
Maximum
60
60
60
80
100
mW
相關(guān)PDF資料
PDF描述
TSPC750AMGS10LH Microprocessor
TSPC750AMGS12LE Microprocessor
TSPC750AMGSU10LE Microprocessor
TSPC750AMGSU10LH Microprocessor
TSPC750AMGSU12LE Microprocessor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSPC603RCAB/Q8L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e
TSPC603RCAB/Q8LC 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e
TSPC603RMAB/Q8L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e
TSPC603RMAB/Q8LC 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 603e RISC Microprocessor Family PID7t-603e
TSPC603RMG10LC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|BGA|255PIN|CERAMIC
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*