參數(shù)資料
型號: TPS65010RGZ
廠商: Texas Instruments, Inc.
英文描述: POWER AND BATTERY MANAGEMENT IC FOR Li-ION POWERED SYSTEMS
中文描述: 電源和電池管理集成電路鋰離子供電系統(tǒng)
文件頁數(shù): 41/50頁
文件大?。?/td> 1006K
代理商: TPS65010RGZ
www.ti.com
MASK2 Register (Address: 04h—Default Value: FFh)
ACKINT1 Register (Address: 05h—Default Value: 00h)
ACKINT2 Register (Address: 06h—Default Value: 00h)
CHGCONFIG Register Address: 07h—Default Value: 1Bh
TPS65010
SLVS149A–JUNE 2003–REVISED JANUARY 2004
MASK2
B7
B6
B5
B4
B3
B2
B1
B0
Mask
Mask
Mask PGOOD
LDO2
Mask PGOOD
LDO1
Mask PGOOD
MAIN
Bit name
Mask UVLO
Mask PGOOD CORE
PB_ONOFF
BATT_COVER
Default
1
1
1
1
1
1
1
Read/write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
The MASK2 register is used to mask all or any of the conditions in the corresponding REGSTATUS<7:0>
positions being indicated at the INT pin. Default is to mask all.
ACKINT1
B7
B6
B5
B4
B3
B2
B1
B0
Ack
Ack Thermal
Shutdown
0
R
Bit name
Ack USB
Ack AC
Ack Term
Ack Taper
Ack Chg
Ack Prechg
BattTemp
0
R
Default
Read/write
0
R
0
R
0
R
0
R
0
R
0
R
The ACKINT1 register is internally used to acknowledge any of the interrupts in the corresponding
CHGSTATUS<7:0> positions. When this is done, the acknowledged interrupt is no longer fed through to the INT
pin and so the INT pin becomes free to indicate the next pending interrupt. If none exists, then the INT pin goes
high, else it will remain low. A
1
at any position in ACKINT1 is automatically cleared when the corresponding
interrupt condition in CHGSTATUS is removed. The application processor should not normally need to access
the ACKINT1 register.
ACKINT2
B7
Ack
B6
B5
B4
B3
B2
B1
B0
Ack BATT_
COVER
0
R
Ack PGOOD
LDO2
0
R
Ack PGOOD
LDO1
0
R
Ack PGOOD
MAIN
0
R
Ack PGOOD
CORE
0
R
Bit name & function
Ack UVLO
PB_ONOFF
0
R
Default
Read/write
0
R
0
R
The ACKINT2 register is internally used to acknowledge any of the interrupts in the corresponding
REGSTATUS<7:0> positions. When this is done, the acknowledged interrupt is no longer fed through to the INT
pin and so the INT pin becomes free to indicate the next pending interrupt. If none exists, then the INT pin goes
high, else it will remain low. A
1
at any position in ACKINT2 is automatically cleared when the corresponding
interrupt condition in REGSTATUS is removed. The application processor should not normally need to access
the ACKINT2 register.
CHGCONFIG
B7
B6
B5
B4
B3
B2
B1
B0
Fast charge
timer + taper
timer enabled
0
R/W
MSB charge
current
LSB charge
current
USB / 100
mA 500 mA
USB charge
allowed
Charge
enable
Bit name
POR
Charger reset
Default
Read/write
0
0
1
1
0
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
The CHGCONFIG register is used to configure the charger.
Bit 7 - POR:
0 = T
n(RESPWRON)
duration typically 1000 ms (+/-25%)
1 = T
n(RESPWRON)
duration typically 69 ms (+/-25%)
Bit 6 - Charger reset:
Clears all the timers in the charger and forces a restart of the charge algorithm.
0 / 1 = This bit must be set and then reset via the serial interface.
41
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