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| 型號(hào)： | TPS65010RGZ |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | POWER AND BATTERY MANAGEMENT IC FOR Li-ION POWERED SYSTEMS |
| 中文描述： | 電源和電池管理集成電路鋰離子供電系統(tǒng) |
| 文件頁數(shù)： | 26/50頁 |
| 文件大?。?/td> | 1006K |
| 代理商： | TPS65010RGZ |
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POWER-UP SEQUENCING
The TPS65010 power-up sequencing is designed to allow the maximum flexibility without generating excessive
logistical or system complexity. The relevant control pins are described in the following table:
TPS65010
SLVS149A–JUNE 2003–REVISED JANUARY 2004
Table 1. Control Pins
PIN NAME
INPUT/OUTPUT
FUNCTION
PS_SEQ
I
Input signal indicating power up and down sequence of the switching converters. PS_SEQ = 0 forces the
core regulator to ramp up first and down last. PS_SEQ = 1 forces the main regulator to ramp up first and
down last.
DEFCORE
I
Defines the default voltage of the VCORE switching converter. DEFCORE = 0 defaults VCORE to 1.5 V,
DEFCORE = VCC defaults VCORE to 1.6 V.
DEFMAIN
I
Defines the default voltage of the VMAIN switching converter. DEFMAIN = 0 defaults VMAIN to 3.0 V,
DEFMAIN = VCC defaults VMAIN to 3.3 V.
LOW_PWR
I
The LOW_PWR pin is used to lower VCORE to the preset voltage in the VDCDC2 register when the
processor is in deep sleep mode. Alternatively VCORE can be disabled in low power mode if the
LP_COREOFF bit is set in the VDCDC2 register. LOW_PWR is ignored if the ENABLE LP bit is not set
in the VDCDC1 register. The TPS65010 uses the rising edge of the internal signal formed by a logical
AND of LOW_PWR and ENABLE LP to enter low power mode. TPS65010 is forced out of low power
mode by de-asserting LOW_PWR, by resetting ENABLE LP to 0, by activating the PB_ONOFF pin or by
activating the HOT_RESET pin. There are two ways to get the device back into low power mode: a)
toggle the LOW_PWR pin, or b) toggle the low power bit when the LOW_PWR pin is held high.
PB_ONOFF
I
PB_ONOFF can be used to exit the low power mode and return the core voltage to the value before low
power mode was entered. If PB_ONOFF is used to exit the low power mode, then the low power mode
can be reentered by toggling the LOW_PWR pin or by toggling the low power bit when the LOW_PWR
pin is held high. A 1-M
pulldown resistor is integrated in TPS65010. PB_ONOFF is internally
de-bounced by the TPS65010. A maskable interrupt is generated when PB_ONOFF is activated.
HOT_RESET
I
The HOT_RESET pin has a very similar functionality to the PB_ONOFF pin. In addition it generates a
reset (MPU_RESET) for the MPU when the VCORE voltage is in regulation. HOT_RESET does not alter
any TPS65010 settings unless low power mode was active in which case it is exited. A 1-M
pullup
resistor to V
CC
is integrated in TPS65010. HOT_RESET is internally de-bounced by the TPS65010.
The BATT_COVER pin is used as an early warning that the main battery is about to be removed.
BATT_COVER = V
indicates that the cover is in place, BATT_COVER = 0 indicates that the cover is
not in place. TPS65010 generates a maskable interrupt when the BATT_COVER pin goes low. PWRFAIL
is also held low when BATT_COVER goes low. This feature may be disabled, by tying BATT_COVER
permanently to VCC. The TPS65010 shuts down the main and the core converters, and sets the LDOs
into low power mode. A 2-M
pulldown resistor is integrated in the TPS65010 at the BATT_COVER pin.
BATT_COVER is internally de-bounced by the TPS65010.
BATT_COVER
I
RESPWRON
O
RESPWRON is held low while the switching converters (and any LDO's defined as default on) are
starting up. It is determined by the state of LDO1's output voltage; when this is good then RESPWRON
is high, when VLDO1 is low then RESPWRON is low. RESPWRON is held low for t
n(RESPWRON)
sec after
VLDO1 has settled.
MPU_RESET
O
MPU_RESET can be used to reset the processor if the user activates theHOT_RESET button. The
MPU_RESET output is active for t
sec. It also forces TPS65010 to leave low power mode.
MPU_RESET is also held low as long as RESPWRON is held low.
PWRFAIL
O
PWRFAIL indicates when V
< V
, when the TPS65010 is about to shut down due to an internal
overtemperature condition or when BATT_COVER is low. PWRFAIL is also held low as long as
RESPWRON is held low.
26
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| TPS65010RGZR | 功能描述:電池管理 Multi-Channel 1-cell Li-Ion RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| TPS65010RGZRG4 | 功能描述:電池管理 Multi-Channel 1-cell Li-Ion RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| TPS65010RGZT | 功能描述:電池管理 Multi-Channel 1-cell Li-Ion RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| TPS65010RGZTG4 | 功能描述:電池管理 Multi-Channel 1-cell Li-Ion RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| TPS65011EVM-049 | 功能描述:電源管理IC開發(fā)工具 TPS65011-049 Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
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