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6.23 Pulse Width Modulator (PWM)
TMS320DM6443
Digital Media System-on-Chip
SPRS282E–DECEMBER 2005–REVISED MARCH 2007
The 3 DM6443 Pulse Width Modulator (PWM) peripherals support the following features:
Period counter
First-phase duration counter
Repeat count for one-shot operation
Configurable to operate in either one-shot or continuous mode
Buffered period and first-phase duration registers
One-shot operation triggerable by hardware events with programmable edge transitions. (low-to-high or
high-to-low).
One-shot operation generates N+1 periods of waveform, N being the repeat count register value
Emulation support
The register memory maps for PWM0/1/2 are shown in
Table 6-98
,
Table 6-99
, and
Table 6-100
.
Table 6-98. PWM0 Register Memory Map
HEX ADDRESS RANGE
0x01C2 2000
0x01C2 2004
0x01C2 2008
0x01C2 200C
0x01C2 2010
0x01C2 2014
0x01C2 2018
0x01C2 201C - 0x01C2 23FF
ACRONYM
REGISTER NAME
Reserved
PWM0 Peripheral Control Register
PWM0 Configuration Register
PWM0 Start Register
PWM0 Repeat Count Register
PWM0 Period Register
PWM0 First-Phase Duration Register
Reserved
PCR
CFG
START
RPT
PER
PH1D
-
Table 6-99. PWM1 Register Memory Map
HEX ADDRESS RANGE
0x01C2 2400
0x01C2 2404
0x01C2 2408
0x01C2 240C
0x01C2 2410
0x01C2 2414
0x01C2 2418
0x01C2 241C -0x01C2 27FF
ACRONYM
REGISTER NAME
Reserved
PWM1 Peripheral Control Register
PWM1 Configuration Register
PWM1 Start Register
PWM1 Repeat Count Register
PWM1 Period Register
PWM1 First-Phase Duration Register
Reserved
PCR
CFG
START
RPT
PER
PH1D
-
Table 6-100. PWM2 Register Memory Map
HEX ADDRESS RANGE
0x01C2 2800
0x01C2 2804
0x01C2 2808
0x01C2 280C
0x01C2 2810
0x01C2 2814
0x01C2 2818
0x01C2 281C - 0x01C2 2BFF
ACRONYM
REGISTER NAME
Reserved
PWM2 Peripheral Control Register
PWM2 Configuration Register
PWM2 Start Register
PWM2 Repeat Count Register
PWM2 Period Register
PWM2 First-Phase Duration Register
Reserved
PCR
CFG
START
RPT
PER
PH1D
-
Peripheral and Electrical Specifications
210
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