參數(shù)資料
型號(hào)： TMSC6701
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： FLOATING POINT DIGITAL SIGNAL PROCESSOR
中文描述： 浮點(diǎn)數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 26/64頁(yè)
文件大?。?/td> 862K
代理商： TMSC6701
SPRS067E – MAY 1998 – REVISED MAY 2000
26
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
absolute maximum ratings over operating case temperature range (unless otherwise noted)
Supply voltage range, CV
DD
(see Note 1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage range, DV
DD
(see Note 1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating case temperature range, T
C
(Default)
(A Version)
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS
.
–0.3 V to 2.3 V
–0.3 V to 4 V
–0.3 V to 4 V
–0.3 V to 4 V
0 C to 90 C
–40 C to 105 C
–55 C to 150 C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
recommended operating conditions
MIN
1.71
NOM
1.8
MAX
1.89
UNIT
V
CVDD
Supply voltage Core
Supply voltage, Core
’6701-120, -150
’6701-167 only
1.81
1.9
1.99
V
DVDD
VSS
VIH
VIL
IOH
IOL
Supply voltage, I/O
3.14
3.30
3.46
V
Supply ground
0
0
0
V
High-level input voltage
2.0
V
Low-level input voltage
0.8
V
High-level output current
–12
mA
Low-level output current
12
90
mA
C
TC
Case temperature
Default
0
A Version
–40
105
C
TI DSP’s do not require specific power sequencing between the core supply and the I/O supply. However, systems should be designed to ensure
that neither supply is powered up for extended periods of time if the other supply is below the proper operating voltage. Excessive exposure to
these conditions can adversely affect the long term reliability of the device. System-level concerns such as bus contention may require supply
sequencing to be implemented. In this case, the core supply should be powered up at the same time as, or prior to (and powered down after),
the I/O buffers. For additional power supply sequencing information, see the Power Supply Sequencing Solutions For Dual Supply Voltage DSPs
application report (literature number SLVA073).
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