參數(shù)資料
型號: TMS20F2810PBKAEP
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors
中文描述: 數(shù)字信號處理器
文件頁數(shù): 22/159頁
文件大小: 2084K
代理商: TMS20F2810PBKAEP
Introduction
22
March 2004 Revised October 2004
SGUS051A
Table 22. Signal Descriptions
(Continued)
NAME
DESCRIPTION
PU/PD§
I/O/Z
PIN NO.
176-PIN
PGF
128-PIN
PBK
179-PIN
GHH
POWER SIGNALS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
H1
23
20
L1
37
29
P5
56
42
P9
75
56
P12
63
1.8-V or 1.9-V Core Digital Power Pins. See Section 6.2,
Recommended
Operating
requirements.
Conditions,
for
voltage
K12
100
74
G12
112
82
C14
128
94
B10
143
102
C8
154
110
G4
19
17
K1
32
26
L2
38
30
P4
52
39
K6
58
P8
70
53
M10
78
59
L11
86
62
Core and Digital I/O Ground Pins
K13
99
73
J14
105
G13
113
E14
120
88
B14
129
95
D10
142
C10
103
B8
153
109
J4
31
25
L7
64
49
L10
81
3.3-V I/O Digital Power Pins
N14
G11
114
83
E9
145
104
VDD3VFL
N8
69
52
3.3-V Flash Core Power Pin. This pin should be connected to
3.3 V at all times after power-up sequence requirements have
been met. This pin is used as VDDIO in ROM parts and must
be connected to 3.3 V in ROM parts as well.
Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA.
I = Input, O = Output, Z = High impedance
§PU = pin has internal pullup; PD = pin has internal pulldown
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