參數(shù)資料
型號： TLV320AIC3120IRHBR
廠商： TEXAS INSTRUMENTS INC
元件分類： 音頻／視頻放大
英文描述： AUDIO AMPLIFIER, PQCC32
封裝： 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù)： 110/150頁
文件大?。?/td> 1507K
代理商： TLV320AIC3120IRHBR
SLAS653 – FEBRUARY 2010
www.ti.com
Based on the available master clock, the chosen DOSR and the targeted sampling rate, the clock divider
values NDAC and MDAC can be determined. If necessary, the internal PLL can add a large degree of
flexibility.
In summary, CODEC_CLKIN (derived directly from the system clock source or from the internal PLL)
divided by MDAC, NDAC, and DOSR must be equal to the DAC sampling rate DAC_fS. The
CODEC_CLKIN clock signal is shared with the DAC clock generation block.
CODEC_CLKIN = NDAC × MDAC × DOSR × DAC_fS
To a large degree, NDAC and MDAC can be chosen independently in the range of 1 to 128. In general,
NDAC should be as large as possible as long as the following condition can still be met:
MDAC × DOSR / 32
≥ RC
RC is a function of the chosen processing block and is listed in Table 5-19.
The common-mode voltage setting of the device is determined by the available analog power supply.
At this point, the following device-specific parameters are known: PRB_Rx, DOSR, NDAC, MDAC, input
and output common-mode values. If the PLL is used, the PLL parameters P, J, D, and R are determined
as well.
Step 2
Setting up the device via register programming:
The following list gives a sequence of items that must be executed in the time between powering the
device up and reading data from the device:
1. Define starting point:
(a) Power up applicable external hardware power supplies
(b) Set register page to 0
(c) Initiate SW reset
2. Program clock settings
(a) Program PLL clock dividers P, J, D, and R (if PLL is used)
(b) Power up PLL (if PLL is used)
(c) Program and power up NDAC
(d) Program and power up MDAC
(e) Program OSR value
(f) Program I2S word length if required (e.g., 20 bits)
(g) Program the processing block to be used
3. Program analog blocks
(a) Set register page to 1
(b) Program common-mode voltage
(c) Program headphone-specific depop settings (in case headphone driver is used)
(d) Program routing of DAC output to the output amplifier (headphone/lineout or speaker)
(e) Unmute and set gain of output driver
(f) Power up output driver
4. Apply waiting time determined by the de-pop settings and the soft-stepping settings of the driver gain,
or poll page 1 / register 63
62
APPLICATION INFORMATION
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC3120
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV320AIC3120IRHBT 功能描述:接口—CODEC Low-Pwr Audio CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC31EVM 功能描述:音頻 IC 開發(fā)工具 TLV320AIC31 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
TLV320AIC31EVM-PDK 功能描述:音頻 IC 開發(fā)工具 TLV320AIC31-PDK Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
TLV320AIC31IRHBR 功能描述:接口—CODEC Lo-Pwr Ster Codec for Port Aud/Teleph RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320AIC31IRHBRG4 功能描述:接口—CODEC Lo-Pwr Ster Codec for Port Aud/Teleph RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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