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參數(shù)資料
| 型號： | TL16C552AMFN |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO |
| 中文描述： | 雙異步通信元帶有FIFO |
| 文件頁數(shù)： | 9/39頁 |
| 文件大?。?/td> | 545K |
| 代理商： | TL16C552AMFN |
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TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
transmitter switching characteristics over recommended ranges of operating free-air temperature
and supply voltage (see Note 11 and Figures 6, 7, and 8)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
td5
Delay time, interrupt THRE
↓
to SOUT
↓
at start
See Figure 6
8
24
RCLK
cycles
td6
Delay time, SOUT
↓
at start to interrupt THRE
↑
See Note 12 and Figure 6
8
9
RCLK
cycles
td7
Delay time, IOW (WR THR)
↑
to interrupt THRE
↑
See Note 12 and Figure 6
16
32
RCLK
cycles
td8
Delay time, SOUT
↓
at start to TXRDY
↓
CL = 100 pF,
See Figures 7 and 8
8
RCLK
cycles
tpd2
Propagation delay time from IOW (WR THR)
↓
to interrupt THRE
↓
CL = 100 pF,
See Figure 6
140
ns
tpd4
Propagation delay time from IOR (RD IIR)
↑
to interrupt THRE
↓
CL = 100 pF,
See Figure 6
140
ns
tpd5
Propagation delay time from IOW (WR THR)
↑
to TXRDY
↑
CL = 100 pF,
See Figures 7 and 8
195
ns
NOTES: 11. These parameters are not production tested.
12. When the transmitter interrupt delay is active, this delay is lengthened by one character time minus the last stop bit time.
receiver switching characteristics over recommended ranges of operating free-air temperature
and supply voltage (see Note 13 and Figures 9 through 13)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
td9
Delay time from stop to INT
↑
See Note 14
1
RCLK
cycle
tpd6
tpd7
tpd8
NOTES: 13. These parameters are not production tested.
14. The receiver data available indicator, the overrun error indicator, the trigger level interrupts, and the active RXRDY indicator are
delayed three RCLK cycles in FIFO mode (FCR0 = 1). After the first byte has been received, status indicators (PE, FE, BI) are
delayed three RCLK cycles. These indicators are updated immediately for any further bytes received after RDRBR goes active.
There are eight RCLK cycle delays for trigger change level interrupts.
Propagation delay time from RCLK
↑
to sample CLK
↑
Propagation delay time from IOR (RD RBR/RD LSR)
↓
to reset interrupt
↓
Propagation delay time from IOR (RD RBR)
↓
to RXRDY
↑
100
ns
CL = 100 pF
150
ns
150
ns
modem control switching characteristics over recommended ranges of operating free-air
temperature and supply voltage, C
L
= 100 pF (see Note 15 and Figure 14)
PARAMETER
MIN
MAX
UNIT
tpd9
tpd10
tpd11
tpd12
NOTE 15: These parameters are not production tested.
Propagation delay time from IOW (WR MCR)
↑
to RTS (DTR)
↓↑
Propagation delay time from modem input (CTS, DSR)
↓↑
to interrupt
↑
Propagation delay time from IOR (RD MSR)
↑
to interrupt
↓
Propagation delay time from RI
↑
to interrupt
↑
100
ns
170
ns
140
ns
170
ns
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TL16C552AMHV | 制造商:Texas Instruments 功能描述:UART 2-CH 16Byte FIFO 5V 68-Pin CFPAK Tube 制造商:Rochester Electronics LLC 功能描述:DUAL 550 UART WITH CENTRONIX PORT - Bulk |
| TL16C552AMHVB | 制造商:Texas Instruments 功能描述:5962-9755001QXA DUAL 550 UART 制造商:Texas Instruments 功能描述:UART 2-CH 16Byte FIFO 5V 68-Pin CFPAK Tube |
| TL16C552AMPN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO |
| TL16C552APN | 功能描述:UART 接口集成電路 Dual UART w/16-Byte FIFOs & Para Port RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| TL16C552APNG4 | 功能描述:UART 接口集成電路 Dual UART w/ 16-Byte FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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