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| 型號(hào)： | TL16C552AMFN |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO |
| 中文描述： | 雙異步通信元帶有FIFO |
| 文件頁數(shù)： | 8/39頁 |
| 文件大?。?/td> | 545K |
| 代理商： | TL16C552AMFN |
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TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
read cycle timing requirements over recommended ranges of operating free-air temperature and
supply voltage (see Note 4 and Figure 4)
MIN
MAX
UNIT
tw4
tsu1
tsu2
th1
th2
td1
td2
NOTES:
Pulse duration, IOR
↓
Setup time, CSx valid before IOR
↓
(see Note 5)
Setup time, A2–A0 valid before IOR
↓
(see Note 5)
Hold time, A2–A0 valid after IOR
↑
(see Note 5)
Hold time, CSx valid after IOR
↑
(see Note 5)
Delay time, tsu2 + tw4 + td2 (see Note 6)
Delay time, IOR
↑
to IOR or IOW
↓
4. These parameters are not production tested.
5. The internal address strobe is always active.
6. In FIFO mode, td1 = 425 ns (min) between reads of the receiver FIFO and the status registers (interrupt identification register and
line status register).
80
ns
15
ns
15
ns
20
ns
20
ns
175
ns
80
ns
write cycle timing requirements over recommended ranges of operating free-air temperature and
supply voltage (see Note 7 and Figure 5)
MIN
MAX
UNIT
tw5
tsu4
tsu5
tsu6
th3
th4
th5
td3
td4
NOTES:
Pulse duration, IOW
↓
Setup time, CSx valid before IOW
↓
(see Note 8)
Setup time, A2–A0 valid before IOW
↓
(see Note 8)
Setup time, DB0–DB7 valid before IOW
↑
Hold time, A2–A0 valid after IOW
↑
(see Note 8)
Hold time, CSx valid after IOW
↑
(see Note 8)
Hold time, DB0–DB7 valid after IOW
↑
Delay time, tsu5 + tw5 + td4
Delay time, IOW
↑
to IOW or IOR
↓
7. These parameters are not production tested.
8. The internal address strobe is always active.
80
ns
15
ns
15
ns
15
ns
20
ns
20
ns
15
ns
175
ns
80
ns
read cycle switching characteristics over recommended ranges of operating free-air temperature
and supply voltage, C
L
= 100 pF (see Note 9 and Figure 4)
PARAMETER
MIN
MAX
UNIT
tpd1
ten
tdis
NOTES:
Propagation delay time from IOR
↓
to BDO
↑
or from IOR
↑
to BDO
↓
Enable time from IOR
↓
to DB0–DB7 valid (see Note 10)
Disable time from IOR
↑
to DB0–DB7 released (see Note 10)
9. These parameters are not production tested.
10. VOL and VOH (and the external loading) determine the charge and discharge time.
60
ns
60
ns
60
ns
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| TL16C554AI | ASYNCHRONOUS-COMMUNICATIONS ELEMENT |
| TL16C554I | ASYNCHRONOUS COMMUNICATIONS ELEMENT |
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| TL2575-33I | 1-A SIMPLE STEP-DOWN SWITCHING VOLTAGE REGULATORS |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TL16C552AMHV | 制造商:Texas Instruments 功能描述:UART 2-CH 16Byte FIFO 5V 68-Pin CFPAK Tube 制造商:Rochester Electronics LLC 功能描述:DUAL 550 UART WITH CENTRONIX PORT - Bulk |
| TL16C552AMHVB | 制造商:Texas Instruments 功能描述:5962-9755001QXA DUAL 550 UART 制造商:Texas Instruments 功能描述:UART 2-CH 16Byte FIFO 5V 68-Pin CFPAK Tube |
| TL16C552AMPN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO |
| TL16C552APN | 功能描述:UART 接口集成電路 Dual UART w/16-Byte FIFOs & Para Port RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| TL16C552APNG4 | 功能描述:UART 接口集成電路 Dual UART w/ 16-Byte FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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